FreeCalypso > hg > fc-tourmaline
comparison src/cs/drivers/drv_app/sim/sim.h @ 189:b37e6c916df1
../drv_app/sim/*: rm trailing white space
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 30 Jan 2021 06:34:22 +0000 |
parents | 4e78acac3d88 |
children | 2e4afc93045d |
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188:92abb46dc1ba | 189:b37e6c916df1 |
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1 /* | 1 /* |
2 * SIM.H | 2 * SIM.H |
3 * | 3 * |
4 * Pole Star SIM | 4 * Pole Star SIM |
5 * | 5 * |
6 * Target : ARM | 6 * Target : ARM |
7 * | 7 * |
10 */ | 10 */ |
11 | 11 |
12 /* | 12 /* |
13 * Device addresses - GCS000 (Gemini / Polestar) | 13 * Device addresses - GCS000 (Gemini / Polestar) |
14 * HER207 (Hercules) | 14 * HER207 (Hercules) |
15 */ | 15 */ |
16 | 16 |
17 #ifndef _WINDOWS | 17 #ifndef _WINDOWS |
18 #include "l1sw.cfg" | 18 #include "l1sw.cfg" |
19 #include "chipset.cfg" | 19 #include "chipset.cfg" |
20 #endif | 20 #endif |
21 | 21 |
22 #include "nucleus.h" | 22 #include "nucleus.h" |
23 | 23 |
24 /* Flags activation section */ | 24 /* Flags activation section */ |
25 // #define SIM_RETRY /* by default : NOT ACTIVE */ | 25 // #define SIM_RETRY /* by default : NOT ACTIVE */ |
26 //#define SIM_DEBUG_TRACE /* by default : NOT ACTIVE */ | 26 //#define SIM_DEBUG_TRACE /* by default : NOT ACTIVE */ |
27 //#define SIM_UWORD16_MASK 0x00ff //when using SIM entity not maped to length on 16 bits | 27 //#define SIM_UWORD16_MASK 0x00ff //when using SIM entity not maped to length on 16 bits |
39 #define SIM_MASK (MEM_SIM + 0x0E) | 39 #define SIM_MASK (MEM_SIM + 0x0E) |
40 | 40 |
41 | 41 |
42 | 42 |
43 /* | 43 /* |
44 * Bit definitions | 44 * Bit definitions |
45 */ | 45 */ |
46 // control regidter | 46 // control regidter |
47 #define SIM_CMD_CRST 0x0001 | 47 #define SIM_CMD_CRST 0x0001 |
48 #define SIM_CMD_SWRST 0x0002 | 48 #define SIM_CMD_SWRST 0x0002 |
49 #define SIM_CMD_STOP 0x0004 | 49 #define SIM_CMD_STOP 0x0004 |
50 #define SIM_CMD_START 0x0008 | 50 #define SIM_CMD_START 0x0008 |
51 #define SIM_CMD_CLKEN 0x0010 | 51 #define SIM_CMD_CLKEN 0x0010 |
52 | 52 |
53 // status register | 53 // status register |
54 #define SIM_STAT_CD 0x0001 // card present | 54 #define SIM_STAT_CD 0x0001 // card present |
55 #define SIM_STAT_TXPAR 0x0002 // transmit parity status | 55 #define SIM_STAT_TXPAR 0x0002 // transmit parity status |
56 #define SIM_STAT_FFULL 0x0004 // fifo full | 56 #define SIM_STAT_FFULL 0x0004 // fifo full |
66 #define SIM_CONF1_SCLKLEV 0x0040 // SIM clock idle level | 66 #define SIM_CONF1_SCLKLEV 0x0040 // SIM clock idle level |
67 #define SIM_CONF1_ETU 0x0080 // ETU period | 67 #define SIM_CONF1_ETU 0x0080 // ETU period |
68 #define SIM_CONF1_BYPASS 0x0100 // bypass hardware timers | 68 #define SIM_CONF1_BYPASS 0x0100 // bypass hardware timers |
69 #define SIM_CONF1_SVCCLEV 0x0200 | 69 #define SIM_CONF1_SVCCLEV 0x0200 |
70 #define SIM_CONF1_SRSTLEV 0x0400 | 70 #define SIM_CONF1_SRSTLEV 0x0400 |
71 #define SIM_CONF1_SIOLOW 0x8000 //force SIO to low level | 71 #define SIM_CONF1_SIOLOW 0x8000 //force SIO to low level |
72 | 72 |
73 // interrupt status register | 73 // interrupt status register |
74 #define SIM_IT_NATR 0x0001 // No answer to reset | 74 #define SIM_IT_NATR 0x0001 // No answer to reset |
75 #define SIM_IT_WT 0x0002 | 75 #define SIM_IT_WT 0x0002 |
76 #define SIM_IT_ITOV 0x0004 | 76 #define SIM_IT_ITOV 0x0004 |
77 #define SIM_IT_ITTX 0x0008 // Transmit | 77 #define SIM_IT_ITTX 0x0008 // Transmit |
78 #define SIM_IT_ITRX 0x0010 // Receipt | 78 #define SIM_IT_ITRX 0x0010 // Receipt |
79 | 79 |
80 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) | 80 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
81 #define SIM_IT_CD 0x0001 // Card insertion/extraction | 81 #define SIM_IT_CD 0x0001 // Card insertion/extraction |
87 #define SIM_MASK_NATR 0x0001 // No answer to reset | 87 #define SIM_MASK_NATR 0x0001 // No answer to reset |
88 #define SIM_MASK_WT 0x0002 | 88 #define SIM_MASK_WT 0x0002 |
89 #define SIM_MASK_OV 0x0004 | 89 #define SIM_MASK_OV 0x0004 |
90 #define SIM_MASK_TX 0x0008 // Transmit | 90 #define SIM_MASK_TX 0x0008 // Transmit |
91 #define SIM_MASK_RX 0x0010 // Receipt | 91 #define SIM_MASK_RX 0x0010 // Receipt |
92 #define SIM_MASK_CD 0x0020 // Card insertion/extraction | 92 #define SIM_MASK_CD 0x0020 // Card insertion/extraction |
93 | 93 |
94 // receveid byte register | 94 // receveid byte register |
95 #define SIM_DRX_STATRXPAR 0x0100 // received byte parity status | 95 #define SIM_DRX_STATRXPAR 0x0100 // received byte parity status |
96 | 96 |
97 // SIM return code OK | 97 // SIM return code OK |
114 // begin of JYT modifications | 114 // begin of JYT modifications |
115 #define SIM_ERR_HARDWARE_FAIL 13 | 115 #define SIM_ERR_HARDWARE_FAIL 13 |
116 // end of JYT modifications | 116 // end of JYT modifications |
117 #define SIM_ERR_RETRY_FAILURE 14 | 117 #define SIM_ERR_RETRY_FAILURE 14 |
118 | 118 |
119 #define SIM_SLEEP_NONE 0 // No SIM available | 119 #define SIM_SLEEP_NONE 0 // No SIM available |
120 #define SIM_SLEEP_DESACT 1 // The Driver is NOT currently in sleep mode (clock is off) | 120 #define SIM_SLEEP_DESACT 1 // The Driver is NOT currently in sleep mode (clock is off) |
121 #define SIM_SLEEP_ACT 2 // The Driver is currently in sleep mode (clock is on) | 121 #define SIM_SLEEP_ACT 2 // The Driver is currently in sleep mode (clock is on) |
122 #define SIM_SLEEP_NOT_ALLOWED 3 // The Driver cannot stop the clock : | 122 #define SIM_SLEEP_NOT_ALLOWED 3 // The Driver cannot stop the clock : |
123 // The card don't want or the interface is not able | 123 // The card don't want or the interface is not able |
124 // to do it. | 124 // to do it. |
125 #define SIM_SLEEP_WAITING_TIME 500 //represent 2.3s of period before entering in sleep mode | 125 #define SIM_SLEEP_WAITING_TIME 500 //represent 2.3s of period before entering in sleep mode |
126 | 126 |
127 #define SIM_CLK_STOP_MASK 0x0D // Clock Stop mask defined by ETSI 11.11 | 127 #define SIM_CLK_STOP_MASK 0x0D // Clock Stop mask defined by ETSI 11.11 |
128 #define SIM_CLK_STOP_NOT_ALLWD 0x00 // see ETSI 11.11 : Clock Stop never allowed | 128 #define SIM_CLK_STOP_NOT_ALLWD 0x00 // see ETSI 11.11 : Clock Stop never allowed |
129 #define SIM_CLK_STOP_ALLWD 0x01 // see ETSI 11.11 : No prefered level | 129 #define SIM_CLK_STOP_ALLWD 0x01 // see ETSI 11.11 : No prefered level |
130 #define SIM_CLK_STOP_HIGH 0x04 // see ETSI 11.11 : High level only | 130 #define SIM_CLK_STOP_HIGH 0x04 // see ETSI 11.11 : High level only |
131 #define SIM_CLK_STOP_LOW 0x08 // see ETSI 11.11 : Low level only | 131 #define SIM_CLK_STOP_LOW 0x08 // see ETSI 11.11 : Low level only |
132 | 132 |
140 #define MODE_DIS_SIMEN 0xFD // used in SIM_PowerOff | 140 #define MODE_DIS_SIMEN 0xFD // used in SIM_PowerOff |
141 #define MODE_ENA_SIMLDOEN 0x20 // used in SIM_ManualStart | 141 #define MODE_ENA_SIMLDOEN 0x20 // used in SIM_ManualStart |
142 #define MODE_ENA_SIMEN 0x02 // used in SIM_ManualStart | 142 #define MODE_ENA_SIMEN 0x02 // used in SIM_ManualStart |
143 #elif(ANLG_FAM == 2) | 143 #elif(ANLG_FAM == 2) |
144 //IOTA specific definitions | 144 //IOTA specific definitions |
145 #define MODE1_8V_IOTA 0x00 | 145 #define MODE1_8V_IOTA 0x00 |
146 #define MODE_INIT_IOTA_3V 0x03 | 146 #define MODE_INIT_IOTA_3V 0x03 |
147 #define MODE_INIT_IOTA_1_8V 0x02 | 147 #define MODE_INIT_IOTA_1_8V 0x02 |
148 #define MODE3V_IOTA 0x01 | 148 #define MODE3V_IOTA 0x01 |
149 #define MODE_DIS_SIMLDOEN 0xFC // SIMSEL + Regulator RSIMEN | 149 #define MODE_DIS_SIMLDOEN 0xFC // SIMSEL + Regulator RSIMEN |
150 #define MODE_DIS_SIMEN 0xF7 | 150 #define MODE_DIS_SIMEN 0xF7 |
151 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN | 151 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN |
152 #define MODE_ENA_SIMEN 0x08 | 152 #define MODE_ENA_SIMEN 0x08 |
153 #elif(ANLG_FAM == 3) | 153 #elif(ANLG_FAM == 3) |
154 //SYREN specific definitions | 154 //SYREN specific definitions |
155 #define MODE1_8V_SYREN 0x00 | 155 #define MODE1_8V_SYREN 0x00 |
156 #define MODE_INIT_SYREN_3V 0x03 | 156 #define MODE_INIT_SYREN_3V 0x03 |
157 #define MODE_INIT_SYREN_1_8V 0x02 | 157 #define MODE_INIT_SYREN_1_8V 0x02 |
158 #define MODE3V_SYREN 0x01 | 158 #define MODE3V_SYREN 0x01 |
159 #define MODE_DIS_SIMLDOEN 0x1FC // SIMSEL + Regulator RSIMEN | 159 #define MODE_DIS_SIMLDOEN 0x1FC // SIMSEL + Regulator RSIMEN |
160 #define MODE_DIS_SIMEN 0x1F7 | 160 #define MODE_DIS_SIMEN 0x1F7 |
161 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN | 161 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN |
162 #define MODE_ENA_SIMEN 0x08 | 162 #define MODE_ENA_SIMEN 0x08 |
178 //default configuration | 178 //default configuration |
179 #ifndef SIM_TYPE | 179 #ifndef SIM_TYPE |
180 #if((ANLG_FAM == 2) || (ANLG_FAM == 3)) | 180 #if((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
181 // Until now (20/03/2003), it is impossible to test IOTA or SYREN with 1.8V Sim Card, | 181 // Until now (20/03/2003), it is impossible to test IOTA or SYREN with 1.8V Sim Card, |
182 // so SIM drv is configured in 3V only with IOTA.and SYREN | 182 // so SIM drv is configured in 3V only with IOTA.and SYREN |
183 // When 1.8V Sim Card will be delivered and tested on IOTA and SYREN, then Sim driver will pass | 183 // When 1.8V Sim Card will be delivered and tested on IOTA and SYREN, then Sim driver will pass |
184 // to : #define SIM_TYPE SIM_TYPE_1_8_3V | 184 // to : #define SIM_TYPE SIM_TYPE_1_8_3V |
185 #define SIM_TYPE SIM_TYPE_1_8_3V // MODIFY BY JENNIFER SIM_TYPE_3V | 185 #define SIM_TYPE SIM_TYPE_1_8_3V // MODIFY BY JENNIFER SIM_TYPE_3V |
186 #else | 186 #else |
187 #define SIM_TYPE SIM_TYPE_3_5V | 187 #define SIM_TYPE SIM_TYPE_3_5V |
188 #endif | 188 #endif |
189 #endif | 189 #endif |
190 | 190 |
191 // begin of modifications of JYT | 191 // begin of modifications of JYT |
192 | 192 |
193 #if((ANLG_FAM == 2) || (ANLG_FAM == 3)) | 193 #if((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
194 #define SIM_MASK_INFO_VOLT 0x70 | 194 #define SIM_MASK_INFO_VOLT 0x70 |
195 #else | 195 #else |
196 #define SIM_MASK_INFO_VOLT 0x10 | 196 #define SIM_MASK_INFO_VOLT 0x10 |
197 #endif | 197 #endif |
198 | 198 |
199 #define SIM_1_8V 0x30 | 199 #define SIM_1_8V 0x30 |
200 #define SIM_3V 0x10 | 200 #define SIM_3V 0x10 |
201 #define SIM_5V 0x00 | 201 #define SIM_5V 0x00 |
202 | 202 |
203 // end of modifications of JYT | 203 // end of modifications of JYT |
204 | 204 |
205 // Max size of Answer to Reset (GSM11.11 5.7.1) | 205 // Max size of Answer to Reset (GSM11.11 5.7.1) |
207 | 207 |
208 // GSM Instruction Class (GSM 11.11 SIM spec) | 208 // GSM Instruction Class (GSM 11.11 SIM spec) |
209 #define GSM_CLASS 0xA0 | 209 #define GSM_CLASS 0xA0 |
210 | 210 |
211 // SIM Instruction Codes | 211 // SIM Instruction Codes |
212 #define SIM_SELECT 0xA4 | 212 #define SIM_SELECT 0xA4 |
213 #define SIM_STATUS 0xF2 | 213 #define SIM_STATUS 0xF2 |
214 #define SIM_READ_BINARY 0xB0 | 214 #define SIM_READ_BINARY 0xB0 |
215 #define SIM_UPDATE_BINARY 0xD6 | 215 #define SIM_UPDATE_BINARY 0xD6 |
216 #define SIM_READ_RECORD 0xB2 | 216 #define SIM_READ_RECORD 0xB2 |
217 #define SIM_UPDATE_RECORD 0xDC | 217 #define SIM_UPDATE_RECORD 0xDC |
218 #define SIM_SEEK 0xA2 | 218 #define SIM_SEEK 0xA2 |
219 #define SIM_INCREASE 0x32 | 219 #define SIM_INCREASE 0x32 |
220 #define SIM_VERIFY_CHV 0x20 | 220 #define SIM_VERIFY_CHV 0x20 |
221 #define SIM_CHANGE_CHV 0x24 | 221 #define SIM_CHANGE_CHV 0x24 |
222 #define SIM_DISABLE_CHV 0x26 | 222 #define SIM_DISABLE_CHV 0x26 |
223 #define SIM_ENABLE_CHV 0x28 | 223 #define SIM_ENABLE_CHV 0x28 |
224 #define SIM_UNBLOCK_CHV 0x2C | 224 #define SIM_UNBLOCK_CHV 0x2C |
225 #define SIM_INVALIDATE 0x04 | 225 #define SIM_INVALIDATE 0x04 |
226 #define SIM_REHABILITATE 0x44 | 226 #define SIM_REHABILITATE 0x44 |
227 #define SIM_RUN_GSM_ALGO 0x88 | 227 #define SIM_RUN_GSM_ALGO 0x88 |
228 #define SIM_GET_RESPONSE 0xC0 | 228 #define SIM_GET_RESPONSE 0xC0 |
229 #define SIM_TERMINAL_PROFILE 0x10 | 229 #define SIM_TERMINAL_PROFILE 0x10 |
230 #define SIM_FETCH 0x12 | 230 #define SIM_FETCH 0x12 |
231 #define SIM_TERMINAL_RESPONSE 0x14 | 231 #define SIM_TERMINAL_RESPONSE 0x14 |
232 #define SIM_ENVELOPE 0xC2 | 232 #define SIM_ENVELOPE 0xC2 |
233 | 233 |
268 #define EF_ECC 0x6FB7 | 268 #define EF_ECC 0x6FB7 |
269 | 269 |
270 | 270 |
271 #define MASK_INS 0xFE | 271 #define MASK_INS 0xFE |
272 #define MASK_CMD 0x11 | 272 #define MASK_CMD 0x11 |
273 #define MASK_RST 0x10 | 273 #define MASK_RST 0x10 |
274 | 274 |
275 | 275 |
276 // Buffer sizes | 276 // Buffer sizes |
277 #define RSIMBUFSIZE 270 | 277 #define RSIMBUFSIZE 270 |
278 #define RSIZESW1SW2 2 | 278 #define RSIZESW1SW2 2 |
279 #define XSIMBUFSIZE 270 | 279 #define XSIMBUFSIZE 270 |
280 | 280 |
281 | 281 |
282 | 282 |
283 | 283 |
293 volatile unsigned short tx; | 293 volatile unsigned short tx; |
294 volatile unsigned short maskit; | 294 volatile unsigned short maskit; |
295 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) | 295 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
296 volatile unsigned short it_cd; | 296 volatile unsigned short it_cd; |
297 #endif | 297 #endif |
298 } SIM_CONTROLLER; | 298 } SIM_CONTROLLER; |
299 | 299 |
300 | 300 |
301 typedef struct | 301 typedef struct |
302 { | 302 { |
303 SYS_UWORD8 Inverse; | 303 SYS_UWORD8 Inverse; |
310 { | 310 { |
311 SIM_CONTROLLER *c; | 311 SIM_CONTROLLER *c; |
312 SYS_UWORD8 *xIn; // xmit input pointer | 312 SYS_UWORD8 *xIn; // xmit input pointer |
313 SYS_UWORD8 *xOut; // xmit output pointer | 313 SYS_UWORD8 *xOut; // xmit output pointer |
314 unsigned errorSIM; // code return in case of error detectd | 314 unsigned errorSIM; // code return in case of error detectd |
315 unsigned short conf1; // image of the configuration register - avoids read/mod/write cycles | 315 unsigned short conf1; // image of the configuration register - avoids read/mod/write cycles |
316 volatile unsigned short txParityErr; | 316 volatile unsigned short txParityErr; |
317 unsigned short rxParityErr; // if 0 no parity error on receipt, 1 if... | 317 unsigned short rxParityErr; // if 0 no parity error on receipt, 1 if... |
318 SYS_UWORD8 Freq_Algo; //use to determine which sim clk freq to choose for running GSM algo | 318 SYS_UWORD8 Freq_Algo; //use to determine which sim clk freq to choose for running GSM algo |
319 SYS_UWORD8 PTS_Try; //use to calculate how many PTS try were already done | 319 SYS_UWORD8 PTS_Try; //use to calculate how many PTS try were already done |
320 SYS_UWORD8 FileC; //value of File Characteristic | 320 SYS_UWORD8 FileC; //value of File Characteristic |
325 SYS_UWORD8 moderx; //inform that we are in receive mode | 325 SYS_UWORD8 moderx; //inform that we are in receive mode |
326 // 0 : mode of normal reception without procedure | 326 // 0 : mode of normal reception without procedure |
327 // 1 : mode of wait for acknowledge during reception of char | 327 // 1 : mode of wait for acknowledge during reception of char |
328 // 2 : mode of reception of data by bloc | 328 // 2 : mode of reception of data by bloc |
329 // 3 : mode of reception of data char by char (proc char) | 329 // 3 : mode of reception of data char by char (proc char) |
330 // 4 : mode of reception of data char by char (data) | 330 // 4 : mode of reception of data char by char (data) |
331 // 5 : mode of reception of procedure char SW1/SW2 | 331 // 5 : mode of reception of procedure char SW1/SW2 |
332 // 6 : mode of wait for acknowledge char after transmission of char | 332 // 6 : mode of wait for acknowledge char after transmission of char |
333 SYS_UWORD16 expected_data; //number of expected char in receive mode proc char | 333 SYS_UWORD16 expected_data; //number of expected char in receive mode proc char |
334 SYS_UWORD8 ack; //acknowledge char | 334 SYS_UWORD8 ack; //acknowledge char |
335 SYS_UWORD8 null_received; //indicates if a NULL char was received | 335 SYS_UWORD8 null_received; //indicates if a NULL char was received |
358 | 358 |
359 | 359 |
360 | 360 |
361 /* | 361 /* |
362 * Prototypes | 362 * Prototypes |
363 */ | 363 */ |
364 // obsolete function | 364 // obsolete function |
365 void SIM_Init(void (Insert(SIM_CARD *cP)), void (Remove(void))); | 365 void SIM_Init(void (Insert(SIM_CARD *cP)), void (Remove(void))); |
366 | 366 |
367 // initialization | 367 // initialization |
368 void SIM_Initialize(void); | 368 void SIM_Initialize(void); |
369 SYS_UWORD16 SIM_Register(void (Insert(SIM_CARD *cP)), void (Remove(void))); | 369 SYS_UWORD16 SIM_Register(void (Insert(SIM_CARD *cP)), void (Remove(void))); |
370 SYS_UWORD16 SIM_Reset(SIM_CARD *cP); | 370 SYS_UWORD16 SIM_Reset(SIM_CARD *cP); |
371 SYS_UWORD16 SIM_Restart(SIM_CARD *cP); | 371 SYS_UWORD16 SIM_Restart(SIM_CARD *cP); |
372 | 372 |
391 SYS_UWORD16 SIM_Invalidate(SYS_UWORD8 *rP, SYS_UWORD16 *size); | 391 SYS_UWORD16 SIM_Invalidate(SYS_UWORD8 *rP, SYS_UWORD16 *size); |
392 SYS_UWORD16 SIM_Rehabilitate(SYS_UWORD8 *rP, SYS_UWORD16 *size); | 392 SYS_UWORD16 SIM_Rehabilitate(SYS_UWORD8 *rP, SYS_UWORD16 *size); |
393 SYS_UWORD16 SIM_RunGSMAlgo(SYS_UWORD8 *result, SYS_UWORD8 *rand, SYS_UWORD16 *size); | 393 SYS_UWORD16 SIM_RunGSMAlgo(SYS_UWORD8 *result, SYS_UWORD8 *rand, SYS_UWORD16 *size); |
394 SYS_UWORD16 SIM_GetResponse(SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *size); | 394 SYS_UWORD16 SIM_GetResponse(SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *size); |
395 | 395 |
396 // STK | 396 // STK |
397 SYS_UWORD16 SIM_TerminalProfile(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); | 397 SYS_UWORD16 SIM_TerminalProfile(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); |
398 SYS_UWORD16 SIM_Fetch(SYS_UWORD8 *result, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); | 398 SYS_UWORD16 SIM_Fetch(SYS_UWORD8 *result, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); |
399 SYS_UWORD16 SIM_TerminalResponse(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); | 399 SYS_UWORD16 SIM_TerminalResponse(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); |
400 SYS_UWORD16 SIM_Envelope(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); | 400 SYS_UWORD16 SIM_Envelope(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize); |
401 | 401 |
410 | 410 |
411 | 411 |
412 | 412 |
413 /* | 413 /* |
414 * Internal Prototypes | 414 * Internal Prototypes |
415 */ | 415 */ |
416 void SIM_WriteBuffer(SIM_PORT *p, SYS_UWORD16 offset, SYS_UWORD16 n); | 416 void SIM_WriteBuffer(SIM_PORT *p, SYS_UWORD16 offset, SYS_UWORD16 n); |
417 SYS_UWORD16 SIM_Result(SIM_PORT *p, SYS_UWORD8 *rP, SYS_UWORD16 *lenP, SYS_UWORD8 offset); | 417 SYS_UWORD16 SIM_Result(SIM_PORT *p, SYS_UWORD8 *rP, SYS_UWORD16 *lenP, SYS_UWORD8 offset); |
418 SYS_UWORD16 SIM_Command(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *rP, SYS_UWORD16 *lP); | 418 SYS_UWORD16 SIM_Command(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *rP, SYS_UWORD16 *lP); |
419 SYS_UWORD16 SIM_Command_Base(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, SYS_UWORD16 *lP); | 419 SYS_UWORD16 SIM_Command_Base(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, SYS_UWORD16 *lP); |
420 SYS_UWORD16 SIM_Dummy(void); | 420 SYS_UWORD16 SIM_Dummy(void); |
442 SYS_BOOL SIM_SleepStatus(void); | 442 SYS_BOOL SIM_SleepStatus(void); |
443 SYS_UWORD16 SIM_Reset_Restart_Internal(SIM_CARD *cP, SYS_UWORD8 ResetFlag); | 443 SYS_UWORD16 SIM_Reset_Restart_Internal(SIM_CARD *cP, SYS_UWORD8 ResetFlag); |
444 | 444 |
445 /* | 445 /* |
446 * Global variables | 446 * Global variables |
447 */ | 447 */ |
448 #ifdef SIM_C | 448 #ifdef SIM_C |
449 #define SI_GLOBAL | 449 #define SI_GLOBAL |
450 #else | 450 #else |
451 #define SI_GLOBAL extern | 451 #define SI_GLOBAL extern |
452 #endif | 452 #endif |
453 | 453 |
454 | 454 |
455 SI_GLOBAL SIM_PORT Sim[1]; | 455 SI_GLOBAL SIM_PORT Sim[1]; |
456 SI_GLOBAL NU_TIMER SIM_timer; | 456 SI_GLOBAL NU_TIMER SIM_timer; |
457 SI_GLOBAL STATUS status_os_sim; | 457 SI_GLOBAL STATUS status_os_sim; |
458 SI_GLOBAL SYS_UWORD8 SIM_sleep_status; | 458 SI_GLOBAL SYS_UWORD8 SIM_sleep_status; |
459 | 459 |