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comparison src/cs/layer1/cfile/l1_small.c @ 0:4e78acac3d88

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src/{condat,cs,gpf,nucleus}: import from Selenite
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 16 Oct 2020 06:23:26 +0000
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-1:000000000000 0:4e78acac3d88
1
2
3 #include "l1sw.cfg"
4 #if (OP_L1_STANDALONE == 0)
5 #include "debug.cfg"
6 #include "rv_swe.h"
7 #endif
8 #if (OP_L1_STANDALONE == 1)
9 #include "general.h"
10 #endif
11 #include "l1_macro.h"
12 #include "l1_confg.h"
13
14 #if (CODE_VERSION == SIMULATION)
15 #include <string.h>
16 #include "l1_types.h"
17 #include "sys_types.h"
18 #include "l1_const.h"
19 #include "l1_time.h"
20 #if TESTMODE
21 #include "l1tm_defty.h"
22 #endif
23 #if (AUDIO_TASK == 1)
24 #include "l1audio_const.h"
25 #include "l1audio_cust.h"
26 #include "l1audio_defty.h"
27 #endif
28 #if (L1_GTT == 1)
29 #include "l1gtt_const.h"
30 #include "l1gtt_defty.h"
31 #endif
32 #if (L1_MP3 == 1)
33 #include "l1mp3_defty.h"
34 #endif
35 #if (L1_MIDI == 1)
36 #include "l1midi_defty.h"
37 #endif
38 #if (L1_AAC == 1)
39 #include "l1aac_defty.h"
40 #endif
41 #include "l1_defty.h"
42 #include "l1_varex.h"
43 #include "cust_os.h"
44 #include "l1_msgty.h"
45
46 #include <stdio.h>
47 #include "sim_cfg.h"
48 #include "sim_cons.h"
49 #include "sim_def.h"
50 #include "sim_var.h"
51
52 #else
53 #include <string.h>
54
55 #include "l1_types.h"
56 #include "sys_types.h"
57 #include "l1_const.h"
58 #include "l1_time.h"
59
60 #if TESTMODE
61 #include "l1tm_defty.h"
62 #endif
63 #if (AUDIO_TASK == 1)
64 #include "l1audio_const.h"
65 #include "l1audio_cust.h"
66 #include "l1audio_defty.h"
67 #endif
68 #if (L1_GTT == 1)
69 #include "l1gtt_const.h"
70 #include "l1gtt_defty.h"
71 #endif
72 #if (L1_MP3 == 1)
73 #include "l1mp3_defty.h"
74 #endif
75 #if (L1_MIDI == 1)
76 #include "l1midi_defty.h"
77 #endif
78 #if (L1_AAC == 1)
79 #include "l1aac_defty.h"
80 #endif
81 #include "l1_defty.h"
82 #include "l1_varex.h"
83 #include "cust_os.h"
84 #include "l1_msgty.h"
85 #include "tpudrv.h"
86
87 #endif
88
89 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
90 #include "sys_memif.h"
91 #endif
92
93 #if (CHIPSET == 15)
94 #include "sys_inth.h"
95 #include "bspI2c.h"
96 #include "clkm.h"
97
98 // This could be removed if i2c_pwr_interface is functional
99 extern volatile Bool bspI2c_busLocked[BSP_I2C_NUM_DEVICES] ;
100 #endif
101
102 #ifndef __GNUC__
103 /* NEW COMPILER MANAGEMENT
104 * With compiler V3.00, the .text section must be explicitely
105 * defined.
106 * Else the following code will be put in the .cinit section.
107 * The change is applied to all compilers.
108 */
109 asm(" .sect \".text\" ");
110 #endif
111
112
113 UWORD8 *mode_authorized = &(l1s.pw_mgr.mode_authorized);
114 UWORD8 *switch_PWR_MNGT = &(l1_config.pwr_mngt);
115
116 #if (W_A_CALYPSO_BUG_01435 == 1)
117
118 asm("SMALL_SLEEP .equ 01h");
119 asm("BIG_SLEEP .equ 02h");
120 asm("DEEP_SLEEP .equ 03h");
121
122 void f_arm_sleep_cmd(UWORD8 d_sleep_mode)
123 {
124 asm(" LDR R3, MPU_FREE_REG");
125
126 // here below the C code:
127 // if ((d_sleep_mode == SMALL_SLEEP) || (d_sleep_mode == BIG_SLEEP))
128 // * (volatile UWORD16 *) 0xfffffd00 &= 0xfffe;
129 // else
130 // if (d_sleep_mode == DEEP_SLEEP)
131 // * (volatile UWORD16 *) 0xfffffd00 &= 0xefff;
132
133 asm(" CMP R0, #SMALL_SLEEP");
134 asm(" BEQ Small_or_Big_Sleep");
135 asm(" CMP R0, #BIG_SLEEP");
136 asm(" BEQ Small_or_Big_Sleep");
137 asm(" CMP R0, #DEEP_SLEEP");
138 asm(" BXNE LR");
139
140 asm("Deep_Sleep: ");
141 asm(" LDR R0, CLKM_CNTL_ARM_CLK_REG");
142 asm(" LDRH R12, [R0, #0]");
143 asm(" AND R1, R12, #255");
144 asm(" AND R12, R12, #61184");
145 asm(" ORR R12, R1, R12");
146 asm(" STRH R12, [R0, #0]");
147 asm(" STMIA R3!, {R4-R7}");
148 asm(" B End_Sleep");
149
150 asm("Small_or_Big_Sleep: ");
151 asm(" LDR R12, CLKM_CNTL_ARM_CLK_REG");
152 asm(" LDRH R0, [R12, #0]");
153 asm(" MOV R0, R0, LSL #16");
154 asm(" MOV R0, R0, LSR #17");
155 asm(" MOV R0, R0, LSL #1");
156 asm(" STRH R0, [R12, #0]");
157 asm(" STMIA R3!, {R4-R7}");
158
159 asm("End_Sleep: ");
160
161 } /* f_arm_sleep_cmd() */
162
163 asm("MPU_FREE_REG .word 0xffffff20");
164 asm("CLKM_CNTL_ARM_CLK_REG .word 0xfffffd00");
165 #endif
166
167 #if (CHIPSET == 15)
168 void init_small_sleep()
169 {
170
171 /* Should not disable bridge_clk during small sleep when an I2C transaction is pending
172
173 In Locosto without BRIDGE_CLK, I2C interrupt is not generated */
174
175 // This could be removed if i2c_pwr_interface is functional
176
177 Uint8 sts=0, camera_sts = 0;
178
179 sts=i2c_pwr_interface(0);
180 #ifdef RVM_CAMD_SWE
181 #if(LOCOSTO_LITE == 0)
182 #if (OP_L1_STANDALONE == 0)
183 camera_sts = camera_pwr_interface(0);
184 #endif
185 #endif
186 #endif
187
188 if (sts != 0
189 #if(LOCOSTO_LITE == 0)
190 || camera_sts != 0
191 #endif
192 )
193 {
194 sts=i2c_pwr_interface(2);//enable
195 *((volatile UINT16 *) CLKM_CNTL_CLK) &= ~CLKM_BRIDGE_DIS;
196 }
197 else
198 {
199 sts=i2c_pwr_interface(1);//disable
200 *((volatile UINT16 *) CLKM_CNTL_CLK) |= CLKM_BRIDGE_DIS;
201 F_INTH_ENABLE_ONE_IT(C_INTH_UART_WAKEUP_IT);
202 }
203 }
204
205
206
207 void exit_small_sleep()
208
209 {
210 i2c_pwr_interface(2);
211 return;
212 }
213
214
215 #endif
216
217 /*-------------------------------------------------------*/
218 /* INT_Small_Sleep() */
219 /*-------------------------------------------------------*/
220 /* */
221 /* Description: small sleep */
222 /* ------------ */
223 /* Called by TCT_Schedule main loop of Nucleus */
224 /*-------------------------------------------------------*/
225
226 #ifndef __GNUC__
227
228 asm(" .def INT_Small_Sleep ");
229 asm("INT_Small_Sleep ");
230
231 /* NEW COMPILER MANAGEMENT
232 * _switch_PWR_MNGT and _mode_authorized must be .def and not .ref
233 * as they are both defined in this file.
234 */
235 asm(" .def _switch_PWR_MNGT ");
236 asm(" .def _mode_authorized ");
237 asm("SMALL_SLEEP .equ 01h ");
238 asm("ALL_SLEEP .equ 04h ");
239 asm("BIG_SMALL_SLEEP .equ 05h ");
240 asm("PWR_MNGT .equ 01h ");
241 #if (OP_L1_STANDALONE == 0)
242 // This code log the number of time the Small sleep
243 // function has been invoked
244 #if (TI_PROFILER == 1)
245 asm(" ldr r0, profiler_counter "); // pick counter
246 asm(" mov r1,#0 ");
247 asm(" str r1,[r0] ");
248 #endif
249
250 #if (TI_NUC_MONITOR == 1)
251 // Push registers on statck because R3 and R4 must not be modified
252 asm(" STMFD sp!,{r0-r5}");
253 asm(" .global _ti_nuc_monitor_sleep ");
254 asm(" BL _ti_nuc_monitor_sleep");
255 asm(" LDMFD sp!,{r0-r5}");
256 #endif
257 // End log call
258 #endif // OP_L1_STANDALONE
259 //asm(" .ref TCT_Schedule_Loop ");
260 //asm(" B TCT_Schedule_Loop ");
261
262 asm(" ldr r0,Switch "); // pick up sleep mode
263 asm(" ldr r0,[r0] "); // take the current value of the register
264 asm(" ldrb r1,[r0] "); // take the current value of the register
265 asm(" cmp r1,#PWR_MNGT "); // take the current value of the register
266 asm(" bne End_small_sleep ");
267
268 asm(" ldr r0,Mode "); // pick up sleep mode
269 asm(" ldr r0,[r0] "); // take the current value of the register
270 asm(" ldrb r1,[r0] "); // take the current value of the register
271 asm(" cmp r1,#SMALL_SLEEP "); // take the current value of the register
272 asm(" beq Small_sleep_ok ");
273 asm(" cmp r1,#ALL_SLEEP "); // take the current value of the register
274 asm(" beq Small_sleep_ok ");
275 asm(" cmp r1,#BIG_SMALL_SLEEP ");
276 asm(" bne End_small_sleep ");
277
278 asm("Small_sleep_ok ");
279
280 // *****************************************************
281 // CQ19599: For Calypso+ chipset, extended page mode
282 // shall be disabled before entering deep sleep and
283 // restored at wake up
284 // *****************************************************
285 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
286 asm(" .ref _f_memif_extended_page_mode_read_bit ");
287 asm(" .ref _f_memif_extended_page_mode_disable ");
288
289 asm(" BL _f_memif_extended_page_mode_read_bit"); //read state of extended page mode
290 asm(" STMFD sp!,{r2}"); //save r2 in stack in case it was used before
291 asm(" MOV r2,r0"); //store the state in r2
292 asm(" BL _f_memif_extended_page_mode_disable"); //disable extended page mode
293 #endif
294
295 #if (CHIPSET == 15)
296 //// Disable IRQs
297 asm(" MRS r1, CPSR ");
298 // asm(" MOV r2,r1"); // Copy the contents on CPSR register to r2
299 asm(" STMFD sp!,{r1}"); // Push r2 in the stack
300 asm(" ORR r1,r1,#00c0h "); // Disable IRQs
301 asm(" MSR CPSR,r1 ");
302
303 asm(" .ref _init_small_sleep");
304 asm(" BL _init_small_sleep");
305 #endif
306
307 // *****************************************************
308 //reset the DEEP_SLEEP bit 12 of CNTL_ARM_CLK register
309 // (Cf BUG_1278)
310 asm(" ldr r0,addrCLKM "); // pick up CNTL_ARM_CLK register address
311 asm(" ldrh r1,[r0] "); // take the current value of the register
312 asm(" orr r1,r1,#1000h "); // reset the bit
313 asm(" strh r1,[r0] "); //store the result
314
315 asm(" ldr r0,addrCLKM "); // pick up CLKM clock register address
316 asm(" ldrh r1,[r0] "); // take the current value of the register
317 asm(" bic r1,r1,#1 "); // disable ARM clock
318 asm(" strh r1,[r0] ");
319 // *****************************************************
320
321 #if (CHIPSET == 15)
322 asm(" .ref _exit_small_sleep");
323 asm(" BL _exit_small_sleep");
324 //Enable IRQs
325 asm(" LDMFD sp!,{r1}"); //restore r2 from stack
326 //asm(" MOV r1,r2"); // Move r2 to r1
327 asm(" MSR CPSR,r1 "); // Copy the contents of r1 to CPSR register
328 #endif
329
330 #if (W_A_CALYPSO_BUG_01435 == 1)
331 asm(" MOV R0, #SMALL_SLEEP");
332 asm(" BL _f_arm_sleep_cmd");
333 #endif
334
335 // *****************************************************
336 // CQ19599: For Calypso+ chipset, restore the extended
337 // page mode if it was enabled before entering sleep
338 // *****************************************************
339 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
340 asm(" .ref _f_memif_extended_page_mode_enable ");
341 asm(" CMP r2,#0"); //check if extended page mode was enabled
342 asm(" BEQ extended_page_mode_restored "); //if not, do nothing
343 asm(" BL _f_memif_extended_page_mode_enable"); //else restore it
344 asm("extended_page_mode_restored ");
345 asm(" LDMFD sp!,{r2}"); //restore r2
346 #endif
347
348 asm(" .ref TCT_Schedule_Loop ");
349 asm("End_small_sleep ");
350 asm(" B TCT_Schedule_Loop "); // Return to TCT_Schedule main loop
351
352 asm("addrCLKM .word 0xfffffd00 ");//CLKM clock register address
353
354 asm("Mode .word _mode_authorized ");
355 asm("Switch .word _switch_PWR_MNGT ");
356 #if (OP_L1_STANDALONE == 0)
357 #if (TI_PROFILER == 1)
358 asm(" .ref _ti_profiler_nb_sleep_call ");
359 asm("profiler_counter .word _ti_profiler_nb_sleep_call ");
360 #endif
361 #endif // OP_L1_STANDALONE
362
363 #endif /* __GNUC__ */