FreeCalypso > hg > fc-tourmaline

annotate src/cs/drivers/drv_app/spi/spi_task.h @ 268:f2e52cab0a73

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
abb_inth.c: check all interrupt causes, not just one The original code used if - else if - else if etc constructs, thus the first detected interrupt was the only one handled. However, Iota ITSTATREG is a clear-on-read register, thus if we only handle the first detected interrupt and skip checking the others, then the other interrupts will be lost, if more than one interrupt happened to occur in one ABB interrupt handling cycle - a form of rare race condition. Change the code to check all interrupts that were read in this cycle.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 13 Jun 2021 18:17:53 +0000
parents 34b7059b9337
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /*****************************************************************************/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 /* */
260
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
3 /* Name spi_task.h */
0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 /* Function this file contains timers definitions used by spi_core, */
260
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
6 /* in case the PWR SWE is defined. */
0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 /* */
260
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
8 /* Version 0.1 */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
9 /* Author Candice Bazanegue */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
10 /* */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
11 /* Date Modification */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
12 /* ------------------------------------ */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
13 /* 20/08/2000 Create */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
14 /* 01/09/2003 Modfication */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
15 /* Author Pascal Puel */
34b7059b9337 drv_app/spi/*: code readability fixes
Mychaela Falconia <falcon@freecalypso.org>
parents: 259
diff changeset
16 /* */
0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 /* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 /*****************************************************************************/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 #ifndef _SPI_TASK_H_
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 #define _SPI_TASK_H_
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 #include "rv/rv_defined_swe.h" // for RVM_PWR_SWE
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 #ifdef RVM_PWR_SWE
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 #include "pwr/pwr_cust.h"
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
28
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
29 #define SPI_TIMER0 (RVF_TIMER_0)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
30 #define SPI_TIMER0_INTERVAL_1 (PWR_BAT_TEST_TIME_1)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 #define SPI_TIMER0_INTERVAL_2 (PWR_BAT_TEST_TIME_2)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
32 #define SPI_TIMER0_INTERVAL_3 (PWR_CALIBRATION_TIME_1)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
33 #define SPI_TIMER0_INTERVAL_4 (PWR_CALIBRATION_TIME_2)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
34 #define SPI_TIMER0_WAIT_EVENT (RVF_TIMER_0_EVT_MASK)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
35
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
36 #define SPI_TIMER1 (RVF_TIMER_1)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
37 #define SPI_TIMER1_INTERVAL (PWR_CI_CHECKING_TIME)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
38 #define SPI_TIMER1_WAIT_EVENT (RVF_TIMER_1_EVT_MASK)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
39
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
40 #define SPI_TIMER2 (RVF_TIMER_2)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
41 #define SPI_TIMER2_INTERVAL (PWR_CV_CHECKING_TIME)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
42 #define SPI_TIMER2_WAIT_EVENT (RVF_TIMER_2_EVT_MASK)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
43
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
44 #define SPI_TIMER3 (RVF_TIMER_3)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
45 #define SPI_TIMER3_INTERVAL (PWR_DISCHARGE_CHECKING_TIME_1)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
46 #define SPI_TIMER3_INTERVAL_BIS (PWR_DISCHARGE_CHECKING_TIME_2)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
47 #define SPI_TIMER3_WAIT_EVENT (RVF_TIMER_3_EVT_MASK)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
48
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
49 #endif // RVM_PWR_SWE
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
50
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
51
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
52 // Prototypes
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
53 void spi_adc_on (void);
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
54 T_RV_RET spi_core(void);
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
55
259
365833d1d186 drv_app/spi/*: rm trailing white space
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
56 #endif // _SPI_TASK_H_