FreeCalypso > hg > fc-tourmaline

annotate src/cs/drivers/drv_app/fchg/bsim_start.c @ 304:58c7961bd0b0 default tip

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
TCH tap: extend DL sniffing feature to support CSD modes Our debug feature for TCH DL sniffing reads the content of the DSP's a_dd_0 buffer (or a_dd_1 for TCH/H subchannel 1) at appropriate times and forwards captured bits to the host. This feature was originally implemented for TCH/FS, TCH/EFS and TCH/HS - now extend it to cover TCH/F data modes too.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 25 Nov 2024 23:33:27 +0000
parents aec644728174
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
254
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /*
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 * This module implements a boot-time function for BSIM mode:
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 * figuring out the initial battery percentage to be reported.
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 */
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 #include "fchg/fchg_env.h"
256
aec644728174 FCHG BSIM: ETM connection implemented
Mychaela Falconia <falcon@freecalypso.org>
parents: 254
diff changeset
7 #include "fchg/bsim_func_i.h"
254
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 #include "rv/rv_general.h"
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9 #include "rvf/rvf_api.h"
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 #include "rvm/rvm_use_id_list.h"
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 void bsim_init_percent(void)
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 {
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 UINT16 i;
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 for (i = 0; i < pwr_ctrl->nb_percent_thresh; i++) {
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 if (pwr_ctrl->batt.percent_thresh[i].remain_capa ==
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 pwr_ctrl->bsim.init_percent) {
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 pwr_ctrl->curr_disch_thresh = i;
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 return;
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 }
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22 }
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 rvf_send_trace("BSIM boot: invalid init_percent setting", 39,
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24 pwr_ctrl->bsim.init_percent, RV_TRACE_LEVEL_ERROR,
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 FCHG_USE_ID);
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26 pwr_ctrl->curr_disch_thresh = 0;
4533ef63fdb0 FCHG BSIM: init_percent logic implemented
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 }