FreeCalypso > hg > fc-tourmaline

annotate cdg-hybrid/cdginc/p_l2r.val @ 257:3edd1a600218

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mfw_mme.c: hack to get initial battery state on boot
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 13 May 2021 04:32:53 +0000
parents 35f7a1dc9f7d
children
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14
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1 /*
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2 +--------------------------------------------------------------------------+
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3 | PROJECT : PROTOCOL STACK |
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4 | FILE : p_l2r.val |
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5 | SOURCE : "sap\l2r.pdf" |
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6 | LastModified : "2001-10-31" |
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7 | IdAndVersion : "8411.102.01.124" |
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8 | SrcFileTime : "Thu Nov 29 09:44:22 2007" |
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9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
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11 +--------------------------------------------------------------------------+
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12 */
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13
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14 /* PRAGMAS
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15 * PREFIX : NONE
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO
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18 * ENABLE_GROUP: NO
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19 * CAPITALIZE_TYPENAME: NO
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20 */
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21
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22
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23 #ifndef P_L2R_VAL
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24 #define P_L2R_VAL
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25
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26
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27 #define CDG_ENTER__P_L2R_VAL
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28
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29 #define CDG_ENTER__FILENAME _P_L2R_VAL
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30 #define CDG_ENTER__P_L2R_VAL__FILE_TYPE CDGINC
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31 #define CDG_ENTER__P_L2R_VAL__LAST_MODIFIED _2001_10_31
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32 #define CDG_ENTER__P_L2R_VAL__ID_AND_VERSION _8411_102_01_124
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33
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34 #define CDG_ENTER__P_L2R_VAL__SRC_FILE_TIME _Thu_Nov_29_09_44_22_2007
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35
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36 #include "CDG_ENTER.h"
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37
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38 #undef CDG_ENTER__P_L2R_VAL
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39
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40 #undef CDG_ENTER__FILENAME
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41
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42
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43 /*
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44 * Value constants for VAL_pt
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45 */
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46 #define L2R_COMPR_TYPE_V42BIS (0x0) /* V.42bis */
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47
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48 /*
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49 * Value constants for VAL_p0
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50 */
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51 #define L2R_COMP_DIR_NONE (0x0) /* compress in neither direction */
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52 #define L2R_COMP_DIR_TRANSMIT (0x1) /* compress in uplink direction only */
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53 #define L2R_COMP_DIR_RECEIVE (0x2) /* compress in downlink direction only */
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54 #define L2R_COMP_DIR_BOTH (0x3) /* compress in both directions */
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55
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56 /*
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57 * Value constants for VAL_uil2p
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58 */
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59 #define L2R_ISO6429 (0x0) /* ISO6429, codeset 0, DC1/DC3 (with flow control) */
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60 #define L2R_COPnoFlCt (0x1) /* Character Oriented Protocol with No Flow Control */
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61
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62 /*
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63 * Value constants for VAL_rate
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64 */
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65 #define L2R_HALFRATE_4800 (0x0) /* halfrate 4,8/6 kBit */
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66 #define L2R_FULLRATE_4800 (0x1) /* fullrate 4,8/6 kBit */
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67 #define L2R_FULLRATE_9600 (0x2) /* fullrate 9,6/12 kBit */
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68 #define L2R_FULLRATE_14400 (0x3) /* fullrate 13,4/14,4 kBit */
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69
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70 /*
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71 * Value constants for VAL_ack_flg
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72 */
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73 #define L2R_ACK (0x0) /* acknowledged */
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74 #define L2R_NAK (0x1) /* not acknowledged */
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75
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76 /*
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77 * Value constants for VAL_cause
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78 */
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79 #define CAUSE_DUMMY (0x0) /* The following causes can occur within this primitive: all those possible within the RLP_ERROR_IND primitive of the RLP SAP */
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80
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81 /*
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82 * Value constants for VAL_dti_conn
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83 */
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84 #define L2R_CONNECT_DTI (0x0) /* Connect DTI to L2R */
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85 #define L2R_DISCONNECT_DTI (0x1) /* Connect DTI to upper layer */
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86
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87 /*
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88 * Value constants for VAL_link_id
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89 */
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90 #define L2R_LINK_ID_DEFAULT (0x0) /* Default link id */
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91
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92 /*
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93 * Value constants for VAL_dti_direction
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94 */
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95 #define L2R_DTI_NORMAL (0x0) /* DTI used normally */
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96 #define L2R_DTI_INVERTED (0x1) /* DTI is inverted */
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97
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98 /*
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99 * user defined constants
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100 */
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101 #define L2R_K_MS_IWF_MIN (0x0)
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102 #define L2R_K_MS_IWF_MAX (0x3d)
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103 #define L2R_K_MS_IWF_DEF (0x3d)
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104 #define L2R_K_IWF_MS_MIN (0x0)
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105 #define L2R_K_IWF_MS_MAX (0x3d)
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106 #define L2R_K_IWF_MS_DEF (0x3d)
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107 #define L2R_T1_MIN_FULLRATE_14400 (0x2a)
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108 #define L2R_T1_MIN_FULLRATE_9600 (0x26)
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109 #define L2R_T1_MIN_FULLRATE_4800 (0x2c)
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110 #define L2R_T1_MIN_HALFRATE_4800 (0x3c)
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111 #define L2R_T1_MIN (0x26)
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112 #define L2R_T1_MAX (0xff)
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113 #define L2R_T1_DEF_FULLRATE_14400 (0x34)
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114 #define L2R_T1_DEF_FULLRATE_9600 (0x30)
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115 #define L2R_T1_DEF_FULLRATE_4800 (0x36)
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116 #define L2R_T1_DEF_HALFRATE_4800 (0x4e)
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117 #define L2R_T1_DEF (0x30)
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118 #define L2R_T2_MIN (0x0)
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119 #define L2R_T2_MAX (0xff)
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120 #define L2R_T2_DEF (0x14)
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121 #define L2R_N2_MIN (0x1)
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122 #define L2R_N2_MAX (0xff)
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123 #define L2R_N2_DEF (0x6)
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124 #define L2R_PT_MIN (0x0)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 #define L2R_PT_MAX (0x0)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 #define L2R_PT_DEF (0x0)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 #define L2R_P0_MIN (0x0)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 #define L2R_P0_MAX (0x0)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 #define L2R_P0_DEF (0x0)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 #define L2R_P1_MIN (0x200)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 #define L2R_P1_MAX (0xffff)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 #define L2R_P1_DEF (0x200)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 #define L2R_P2_MIN (0x6)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 #define L2R_P2_MAX (0xfa)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 #define L2R_P2_DEF (0x6)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 #define L2R_BYTES_PER_PRIM_MIN (0x19)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 #define L2R_BYTES_PER_PRIM_MAX (0xfa)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 #define L2R_BYTES_PER_PRIM_DEF (0xfa)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 #define L2R_BUFFER_SIZE_MIN (0x800)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 #define L2R_BUFFER_SIZE_MAX (0x1000)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 #define L2R_BUFFER_SIZE_DEF (0x800)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 #define L2R_ENTITY_NAME_LEN (0x6)
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 #include "CDG_LEAVE.h"
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146
35f7a1dc9f7d cdg-hybrid: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 #endif