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comparison duart28/design-spec @ 37:b2d6d8f756ea

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duart28/design-spec: re-measured partial power-down current
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 23 Jul 2020 18:14:16 +0000
parents 40e2106a0500
children ba83a7cd6451
comparison
equal deleted inserted replaced
36:40e2106a0500 37:b2d6d8f756ea
170 170
171 2) When a Calypso device is connected to the USB DUART adapter, the Calypso 171 2) When a Calypso device is connected to the USB DUART adapter, the Calypso
172 device is up and running (VRPC Active state), but there is no USB host 172 device is up and running (VRPC Active state), but there is no USB host
173 connected, current can flow from Calypso outputs into a powered-down FT2232D 173 connected, current can flow from Calypso outputs into a powered-down FT2232D
174 (or other front-end chips) in the USB DUART adapter. With our current raw 174 (or other front-end chips) in the USB DUART adapter. With our current raw
175 FT2232D-to-Calypso arrangement we have about 5 mA of current flowing per pin 175 FT2232D-to-Calypso arrangement we have about 5.8 mA of current flowing per pin
176 under the described condition, which is a little too much. 176 under the described condition, which is way too much.
177 177
178 If we replace the generic FT2232D breakout with our own custom adapter board 178 If we replace the generic FT2232D breakout with our own custom adapter board
179 design, we can solve the second partial power-down problem (the case of Calypso 179 design, we can solve the second partial power-down problem (the case of Calypso
180 on, but no USB host) by inserting LVC buffers in front of FT2232D inputs - 180 on, but no USB host) by inserting LVC buffers in front of FT2232D inputs -
181 these LVC buffers are fully specified for partial power-down applications and 181 these LVC buffers are fully specified for partial power-down applications and