FreeCalypso > hg > fc-small-hw
comparison bb2fc/schem+bom/schem.v @ 0:0f9bdd60ce50
fc-small-hw separated from old freecalypso-schem repo
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Mon, 21 Oct 2019 00:53:38 +0000 |
| parents | |
| children |
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| -1:000000000000 | 0:0f9bdd60ce50 |
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| 1 module board (); | |
| 2 | |
| 3 wire GND, P_5V, P_1V8, P_2V8; | |
| 4 wire REGEN; | |
| 5 | |
| 6 wire OMAP_McBSP_DR, OMAP_McBSP_FS, OMAP_McBSP_CLK, OMAP_McBSP_DX; | |
| 7 wire OMAP_UART_RTS, OMAP_UART_RxD, OMAP_UART_TxD, OMAP_UART_CTS; | |
| 8 | |
| 9 wire Calypso_MCSI_TXD, Calypso_MCSI_RXD, Calypso_MCSI_CLK, Calypso_MCSI_FSYNCH; | |
| 10 wire Calypso_UART_TxD, Calypso_UART_RxD, Calypso_UART_RTS, Calypso_UART_CTS; | |
| 11 | |
| 12 conn_28pin bb_xm_conn ( .pin_1(P_1V8), | |
| 13 .pin_2(P_5V), | |
| 14 .pin_3(), | |
| 15 .pin_4(OMAP_UART_CTS), | |
| 16 .pin_5(), | |
| 17 .pin_6(OMAP_UART_TxD), | |
| 18 .pin_7(), | |
| 19 .pin_8(OMAP_UART_RxD), | |
| 20 .pin_9(), | |
| 21 .pin_10(OMAP_UART_RTS), | |
| 22 .pin_11(), | |
| 23 .pin_12(OMAP_McBSP_DX), | |
| 24 .pin_13(), | |
| 25 .pin_14(OMAP_McBSP_CLK), | |
| 26 .pin_15(), | |
| 27 .pin_16(OMAP_McBSP_FS), | |
| 28 .pin_17(), | |
| 29 .pin_18(OMAP_McBSP_DR), | |
| 30 .pin_19(), | |
| 31 .pin_20(), | |
| 32 .pin_21(), | |
| 33 .pin_22(), | |
| 34 .pin_23(), | |
| 35 .pin_24(), | |
| 36 .pin_25(REGEN), | |
| 37 .pin_26(), | |
| 38 .pin_27(GND), | |
| 39 .pin_28(GND) | |
| 40 ); | |
| 41 | |
| 42 capacitor C1 (P_5V, GND); | |
| 43 capacitor C3 (P_1V8, GND); | |
| 44 | |
| 45 regulator reg ( .IN(P_5V), | |
| 46 .OUT(P_2V8), | |
| 47 .GND(GND), | |
| 48 .EN(P_5V) | |
| 49 ); | |
| 50 | |
| 51 capacitor C2 (P_2V8, GND); | |
| 52 | |
| 53 /* U1 for MCSI */ | |
| 54 | |
| 55 buffer_ic_common U1common (.VccA(P_2V8), | |
| 56 .VccB(P_1V8), | |
| 57 .GND(GND), | |
| 58 .OE(GND) | |
| 59 ); | |
| 60 | |
| 61 capacitor C4 (P_2V8, GND); | |
| 62 capacitor C5 (P_1V8, GND); | |
| 63 | |
| 64 buffer_ic_slot U1slot1 (.A(Calypso_MCSI_TXD), | |
| 65 .B(OMAP_McBSP_DR), | |
| 66 .DIR(P_2V8) | |
| 67 ); | |
| 68 | |
| 69 buffer_ic_slot U1slot2 (.A(Calypso_MCSI_FSYNCH), | |
| 70 .B(OMAP_McBSP_FS), | |
| 71 .DIR(P_2V8) | |
| 72 ); | |
| 73 | |
| 74 buffer_ic_slot U1slot3 (.A(Calypso_MCSI_CLK), | |
| 75 .B(OMAP_McBSP_CLK), | |
| 76 .DIR(P_2V8) | |
| 77 ); | |
| 78 | |
| 79 buffer_ic_slot U1slot4 (.A(Calypso_MCSI_RXD), | |
| 80 .B(OMAP_McBSP_DX), | |
| 81 .DIR(GND) | |
| 82 ); | |
| 83 | |
| 84 header_5pin J2 (.pin_1(GND), | |
| 85 .pin_2(Calypso_MCSI_TXD), | |
| 86 .pin_3(Calypso_MCSI_FSYNCH), | |
| 87 .pin_4(Calypso_MCSI_CLK), | |
| 88 .pin_5(Calypso_MCSI_RXD) | |
| 89 ); | |
| 90 | |
| 91 /* U2 for UART */ | |
| 92 | |
| 93 buffer_ic_common U2common (.VccA(P_2V8), | |
| 94 .VccB(P_1V8), | |
| 95 .GND(GND), | |
| 96 .OE(GND) | |
| 97 ); | |
| 98 | |
| 99 capacitor C6 (P_2V8, GND); | |
| 100 capacitor C7 (P_1V8, GND); | |
| 101 | |
| 102 buffer_ic_slot U2slot1 (.A(Calypso_UART_CTS), | |
| 103 .B(OMAP_UART_RTS), | |
| 104 .DIR(GND) | |
| 105 ); | |
| 106 | |
| 107 buffer_ic_slot U2slot2 (.A(Calypso_UART_TxD), | |
| 108 .B(OMAP_UART_RxD), | |
| 109 .DIR(P_2V8) | |
| 110 ); | |
| 111 | |
| 112 buffer_ic_slot U2slot3 (.A(Calypso_UART_RxD), | |
| 113 .B(OMAP_UART_TxD), | |
| 114 .DIR(GND) | |
| 115 ); | |
| 116 | |
| 117 buffer_ic_slot U2slot4 (.A(Calypso_UART_RTS), | |
| 118 .B(OMAP_UART_CTS), | |
| 119 .DIR(P_2V8) | |
| 120 ); | |
| 121 | |
| 122 header_5pin J3 (.pin_1(GND), | |
| 123 .pin_2(Calypso_UART_CTS), | |
| 124 .pin_3(Calypso_UART_TxD), | |
| 125 .pin_4(Calypso_UART_RxD), | |
| 126 .pin_5(Calypso_UART_RTS) | |
| 127 ); | |
| 128 | |
| 129 endmodule |
