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sim-fpc-pasv/pcb: add Makefile for Gerber output
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 02 Nov 2022 07:22:44 +0000
parents 000411b39576
children
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1 VSRCS= vsrc/MAX1916.v vsrc/bl_current_sink.v vsrc/board.v \
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2 vsrc/current_select.v vsrc/lcd_module.v
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000411b39576 lunalcd2/src/Makefile: generate BOM outputs
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3 BOMS= tallied-bom.txt tallied-bom.csv comptab.txt
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df8f40386c0b lunalcd2/src/Makefile: generate pcb-netlist.txt
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4 NETS= sverp.unet bound.unet pcb-netlist.txt
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6 all: ${BOMS} ${NETS} elements.pcb
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000411b39576 lunalcd2/src/Makefile: generate BOM outputs
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8 tallied-bom.txt: MCL
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9 ueda-mkbom -cr > $@
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000411b39576 lunalcd2/src/Makefile: generate BOM outputs
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11 tallied-bom.csv: MCL
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12 ueda-csvbom > $@
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14 comptab.txt: MCL
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15 ueda-shortbom > $@
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17 sverp.unet: ${VSRCS} primitives Makefile
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18 ueda-sverp -o $@ ${VSRCS}
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20 bound.unet: MCL sverp.unet
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21 unet-bind -c sverp.unet $@
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23 pcb-netlist.txt: bound.unet
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24 unet2pcb bound.unet $@
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26 elements.pcb: MCL
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27 ueda-getfps -ch | ueda-runm4 > $@
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29 clean:
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30 rm -f *.unet *.txt *.csv errs elements.pcb