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FPGA Makefile: generate timing.rpt
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 01:12:16 +0000
parents fbbafa93b52b
children
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capacitor	numpins 2;

header_4pin	numpins 4;
conn_6pin_plus2	numpins 8;
pkg_SIM_socket	numpins 8;