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FPGA Makefile: generate timing.rpt
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 01:12:16 +0000
parents 55e5f926fb5a
children
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/* passives */
capacitor	numpins 2;
resistor	numpins 2;

/* connectors */
header_6pin	numpins 6;

/* sniffing buffer IC: 74LVC4T3144 */
pkg_TSSOP14	numpins 14;