FreeCalypso > hg > fc-sim-sniff

annotate sw/sniff-rx/byteproc.c @ 39:a9e87abeeaa2

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doc/Cardem-plans: article written
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 30 Aug 2023 03:32:06 +0000
parents b112c2df6c43
children 43f678895a3a
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1 /*
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2 * In this module we implement byte-level processing of the serial stream
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3 * coming from the sniffer FPGA.
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4 */
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5
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6 #include <sys/time.h>
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7 #include <stdio.h>
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8 #include <stdlib.h>
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9 #include <time.h>
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10
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11 extern FILE *main_outf;
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12 extern int logfile_flag;
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13 extern struct timeval curtime;
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14 extern struct tm *cur_tm;
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16 static int byte_pending_flag, byte_pending_val;
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17
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18 void
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19 rx_byte_in(new_byte)
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20 {
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21 if (!byte_pending_flag) {
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22 byte_pending_flag = 1;
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23 byte_pending_val = new_byte;
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24 return;
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25 }
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26 /* received complete 2-byte message from the FPGA */
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27 fprintf(main_outf, "[%02d:%02d:%02d.%06u] %02X%02X\n", cur_tm->tm_hour,
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28 cur_tm->tm_min, cur_tm->tm_sec, (unsigned) curtime.tv_usec,
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29 new_byte, byte_pending_val);
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30 byte_pending_flag = 0;
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31 if (logfile_flag && (new_byte & 0x80))
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32 printf("SIM RST is %s\n", new_byte & 0x40 ? "high" : "low");
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33 }
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34
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35 void
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36 flush_pending_byte()
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37 {
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38 if (!byte_pending_flag)
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39 return;
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40 printf("BAD BAD BAD: loss of byte sync with FPGA source!\n");
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41 byte_pending_flag = 0;
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42 }