FreeCalypso > hg > fc-sim-sniff

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FPGA Makefile: generate timing.rpt
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 01:12:16 +0000
parents beeda5368a77
children 00229623ca81
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3 \.csv$
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4 \.txt$
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5 \.unet$
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6 \.ps$
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7 \.pdf$
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beeda5368a77 .hgignore: add FPGA build products
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9 \.asc$
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10 \.bin$
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11 \.json$
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12 \.rpt$
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0c321f1ce085 boards/mv-sniffer/src: generate elements.pcb
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14 ^boards/mv-sniffer/src/elements\.pcb$
0c321f1ce085 boards/mv-sniffer/src: generate elements.pcb
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16 ^boards/sim-fpc-pasv/pcb/gerbers\.
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17 ^boards/sim-fpc-pasv/src/elements\.pcb$