| Mon, 23 Jul 2018 07:01:39 +0000 |
Mychaela Falconia |
build system support for memory supervision
|
| Mon, 23 Jul 2018 01:47:29 +0000 |
Mychaela Falconia |
OSL reconstruction fixed to support memory supervision
|
| Sun, 22 Jul 2018 20:44:47 +0000 |
Mychaela Falconia |
components/*: added -g to CFLAGS_gcc
|
| Sun, 22 Jul 2018 20:06:18 +0000 |
Mychaela Falconia |
src/g23m-gsm/sms/sms_for.c: ccd_err_entry does not need to be initialized
|
| Sat, 21 Jul 2018 07:28:12 +0000 |
Mychaela Falconia |
LICENSE: same as Citrine and Magnetite
|
| Sat, 21 Jul 2018 07:26:47 +0000 |
Mychaela Falconia |
README: update for the outcome of the gcc experiment
|
| Sat, 21 Jul 2018 03:36:09 +0000 |
Mychaela Falconia |
gcc-specific fix for AT+CFUN from Citrine
|
| Sat, 21 Jul 2018 02:23:48 +0000 |
Mychaela Falconia |
old configure.sh script is now configure-tms470.sh
|
| Sat, 21 Jul 2018 02:10:28 +0000 |
Mychaela Falconia |
gcc/ld-script.src: .bss_dar moved to the beginning of XRAM
|
| Sat, 21 Jul 2018 01:30:53 +0000 |
Mychaela Falconia |
src/g23m-gsm/sms/sms_for.c: malloc bogon removed
|
| Sat, 21 Jul 2018 01:12:48 +0000 |
Mychaela Falconia |
closer to passing link with abort, exit and __assert_func stubbed out
|
| Sat, 21 Jul 2018 01:03:53 +0000 |
Mychaela Falconia |
gcc/makefile-body: a few fixes
|
| Sat, 21 Jul 2018 00:32:56 +0000 |
Mychaela Falconia |
configure-gcc.sh: created
|
| Sat, 21 Jul 2018 00:22:35 +0000 |
Mychaela Falconia |
components/main_ir: ramvecs module now goes outside of libs
|
| Sat, 21 Jul 2018 00:21:50 +0000 |
Mychaela Falconia |
gcc/makefile-body: created
|
| Fri, 20 Jul 2018 23:39:27 +0000 |
Mychaela Falconia |
.../main/gcc/bootentry.S: the literal pool needs to be arranged
|
| Fri, 20 Jul 2018 23:14:00 +0000 |
Mychaela Falconia |
src/cs/system/main/gcc/bootentry.S: written
|
| Fri, 20 Jul 2018 20:53:45 +0000 |
Mychaela Falconia |
scripts/test-setup-tms470.sh: updated
|
| Fri, 20 Jul 2018 20:44:02 +0000 |
Mychaela Falconia |
components/libsys_{fl,ir}: created
|
| Fri, 20 Jul 2018 20:36:19 +0000 |
Mychaela Falconia |
src/libsys: pieced together from Citrine
|
| Fri, 20 Jul 2018 20:22:38 +0000 |
Mychaela Falconia |
components/main_ir: created for assembly modules
|
| Fri, 20 Jul 2018 19:36:25 +0000 |
Mychaela Falconia |
gcc/ld-script.src: additional polish
|
| Fri, 20 Jul 2018 18:21:46 +0000 |
Mychaela Falconia |
.../gcc/exceptions.S: added 2nd part that was missing in Citrine
|
| Fri, 20 Jul 2018 17:33:14 +0000 |
Mychaela Falconia |
linker script for gcc fw build: initial version put together
|
| Fri, 20 Jul 2018 09:38:01 +0000 |
Mychaela Falconia |
targets/*.m4 created for linker script generation in gcc version
|
| Fri, 20 Jul 2018 07:36:23 +0000 |
Mychaela Falconia |
created int_dummy.S with INT_*() functions for tcc.c
|
| Fri, 20 Jul 2018 06:51:54 +0000 |
Mychaela Falconia |
components/main: compile exceptions.S for gcc
|
| Fri, 20 Jul 2018 06:46:56 +0000 |
Mychaela Falconia |
src/cs/system/main/gcc: asm code pieced from Citrine
|
| Fri, 20 Jul 2018 06:12:21 +0000 |
Mychaela Falconia |
components/l1_int: compile l1_small_asm.S for gcc
|
| Fri, 20 Jul 2018 05:56:58 +0000 |
Mychaela Falconia |
l1_small_asm.S: import from Citrine
|
