# HG changeset patch
# User Mychaela Falconia <falcon@freecalypso.org>
# Date 1552249686 0
# Node ID df9c471ce9e9b8b189f7204a1f1162962384e6c0
# Parent  d3668a47b9698c7f22c5930afaba5cf873d324a5
l1_rf12.c and tpudrv12.[ch]: updates from Magnetite

diff -r d3668a47b969 -r df9c471ce9e9 src/cs/layer1/cust0/l1_rf12.c
--- a/src/cs/layer1/cust0/l1_rf12.c	Thu Feb 07 00:11:43 2019 +0000
+++ b/src/cs/layer1/cust0/l1_rf12.c	Sun Mar 10 20:28:06 2019 +0000
@@ -11,8 +11,12 @@
 #endif
 
 /*
- * FreeCalypso: the following T_RF table perfectly matches
- * between the MV100 source and the Leonardo binary object.
+ * FreeCalypso: the following T_RF table was originally taken from the MV100
+ * source; it perfectly matched Openmoko's binary object prior to our own
+ * FC modification.  We have made one change to it: the low_agc field in the
+ * T_AGC structure was originally set to 6 in TI's code, which is clearly an
+ * overlooked remnant from Clara RF, as Rita AGC cannot go below 14 dB.  We
+ * have changed this number to 14 to reflect our current hardware reality.
  */
 
 T_RF rf =
@@ -24,7 +28,7 @@
     { //AGC structure
       140,  // low_agc_noise_thr;
       110,  // high_agc_sat_thr;
-        6,  // low_agc;
+       14,  // low_agc;
        34,  // high_agc;
       //IL2AGC tables
       {  // below is: il2agc_pwr[121];
@@ -448,11 +452,11 @@
  * tables had ARFCNs that are invalid for the band they are supposed
  * to apply to.  The latter bug has been fixed.
  *
- * - For the Tx ramps tables we now select between two different versions
- * at compile time: for Mot C1xx targets (CONFIG_TARGET_COMPAL) we use
- * the version extracted from Mot's official C139 fw, whereas for all
- * other targets (principally FreeCalypso hw) we continue to use the
- * version extracted from OM's l1_cust.obj blob.
+ * - For the Tx ramps tables we now select between 3 different versions
+ * at compile time: the original version from OM is used for our own
+ * OM-based FC hardware, whereas Mot C1xx builds use one of two different
+ * Mot/Compal versions: one version for C11x/12x and C155/156 (SKY77324
+ * RF PA) and a different version for C139/140 (SKY77325 RF PA).
  *
  * NONE of these compiled-in tables matter if you are running the fw
  * on an Openmoko, Pirelli or FreeCalypso device that has already been
@@ -469,10 +473,10 @@
  * from Motorola's factory bits, but for the Tx ramp templates the tables
  * compiled into our fw are used - hence these tables need to be correct
  * for the target in question, which is why we have extracted and included
- * the tables from Mot C139 official fw.  We also weren't able to grok
- * Mot's way of doing Tx channel corrections, hence we run without those
- * - thus we rely on the compiled-in channel calibration tables providing
- * a neutral set of correction values.
+ * the tables from two different Mot/Compal official fw versions.  We also
+ * weren't able to grok Compal's way of doing Tx channel corrections, hence
+ * we run without those - thus we rely on the compiled-in channel calibration
+ * tables providing a neutral set of correction values.
  *
  * - Firmware images that are programmed into newly made FreeCalypso hw
  * devices in the factory production environment prior to RF calibration
@@ -497,13 +501,11 @@
  * it would be rather moot to argue whether set of numbers A or set of
  * numbers B would make a better placeholder.
  *
- * For the Tx ramp templates on our newly made FreeCalypso hw we currently
- * use the ramps tables extracted from OM's l1_cust.obj blob: they were
- * used by OM, and our current RF hw is unchanged from OM GTA02.  However,
- * these Tx ramp templates are currently only *assumed* to be correct,
- * and no actual testing has been done yet - these Tx power ramps will
- * need to be revisited and tested empirically before we apply for type
- * approval certification.
+ * All of our Tx ramp templates (the ones used on our own FCDEV3B and both
+ * Mot C1xx versions) have been verified with our CMU200 RF tester and
+ * found to produce correct in-tolerance ramps on all tested targets (FCDEV3B,
+ * EU-band Mot C118, US-band Mot C139, EU-band Mot C140 and US-band Mot C155)
+ * for each power control level in all supported bands.
  */
 
 const T_RF_BAND rf_900 = {
@@ -618,7 +620,105 @@
       },
     },
     { /* ramps */
-#ifdef CONFIG_TARGET_COMPAL
+#if defined(CONFIG_TARGET_C11X) || defined(CONFIG_TARGET_C155)
+      /* from Motorola R87.2.1.03.m0 fw for the C11x family */
+      { /* profile 0 */
+	/* ramp-up */
+	{ 30,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31, 31,  5,  0},
+	/* ramp-down */
+	{ 31, 31, 28, 15,  2,  0, 19,  2,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 1 */
+	/* ramp-up */
+	{ 31,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0, 30, 26, 29,  8,  0},
+	/* ramp-down */
+	{ 31, 31, 29, 14,  2,  1, 15,  2,  3,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 2 */
+	/* ramp-up */
+	{ 31, 14,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 27, 24,  1,  0},
+	/* ramp-down */
+	{ 30, 31, 25, 14,  2,  2, 15,  7,  2,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 3 */
+	/* ramp-up */
+	{ 31, 22,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 14, 29,  1,  0},
+	/* ramp-down */
+	{ 31, 29, 31, 13,  2,  2, 15,  2,  3,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 4 */
+	/* ramp-up */
+	{ 31, 30,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 17, 19,  0,  0},
+	/* ramp-down */
+	{ 31, 30, 30, 15,  1,  2, 17,  2,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 5 */
+	/* ramp-up */
+	{ 31, 31,  7,  0,  0,  0,  0,  0,  0,  0,  0, 31, 19,  7,  2,  0},
+	/* ramp-down */
+	{ 29, 31, 29, 16,  4,  0, 14,  2,  1,  2,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 6 */
+	/* ramp-up */
+	{ 31, 31, 16,  0,  0,  0,  0,  0,  0,  0,  0, 30,  0, 20,  0,  0},
+	/* ramp-down */
+	{ 19, 26, 26, 28, 10,  0, 19,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 7 */
+	/* ramp-up */
+	{ 31, 31, 25,  0,  0,  0,  0,  0,  0,  0,  0, 31,  0,  8,  2,  0},
+	/* ramp-down */
+	{ 19, 28, 31, 24,  4,  0, 19,  3,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 8 */
+	/* ramp-up */
+	{ 31, 31, 31,  2,  0,  0,  0,  0,  0,  0,  0, 31,  2,  0,  0,  0},
+	/* ramp-down */
+	{ 19, 28, 31, 24,  4,  0, 17,  5,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 9 */
+	/* ramp-up */
+	{ 31, 31, 31,  9,  0,  0,  0,  0,  0,  0,  0, 26,  0,  0,  0,  0},
+	/* ramp-down */
+	{ 18, 25, 28, 31,  2,  2, 19,  3,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 10 */
+	/* ramp-up */
+	{ 31, 31, 31, 16,  0,  0,  0,  0,  0,  0,  0,  0, 19,  0,  0,  0},
+	/* ramp-down */
+	{ 14, 21, 24, 29,  6,  2, 23,  5,  4,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 11 */
+	/* ramp-up */
+	{ 31, 31, 31, 22,  0,  0,  0,  0,  0,  0,  0,  0, 12,  0,  1,  0},
+	/* ramp-down */
+	{  8, 26, 26, 28, 12, 12,  5,  5,  0,  6,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 12 */
+	/* ramp-up */
+	{ 31, 31, 31, 27,  0,  0,  0,  0,  0,  0,  0,  0,  8,  0,  0,  0},
+	/* ramp-down */
+	{  8, 14, 27, 30, 20, 19, 10,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 13 */
+	/* ramp-up */
+	{ 31, 31, 31, 31,  0,  0,  0,  0,  0,  0,  0,  0,  3,  0,  1,  0},
+	/* ramp-down */
+	{  9, 10, 15, 26, 25, 10, 17, 13,  3,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 14 */
+	/* ramp-up */
+	{ 31, 31, 30, 30,  1,  5,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+	/* ramp-down */
+	{  0,  4, 15, 21, 21, 21, 21, 15, 10,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 15 */
+	/* ramp-up */
+	{ 31, 31, 30, 30,  1,  5,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+	/* ramp-down */
+	{  0,  4, 15, 21, 21, 21, 21, 15, 10,  0,  0,  0,  0,  0,  0,  0},
+      },
+#elif defined(CONFIG_TARGET_C139)
       /* from Mot C139 official fw */
       { /* profile 0 */
 	/* ramp-up */
@@ -948,7 +1048,105 @@
       },
     },
     { /* ramps */
-#ifdef CONFIG_TARGET_COMPAL
+#if defined(CONFIG_TARGET_C11X) || defined(CONFIG_TARGET_C155)
+      /* from Motorola R87.2.1.03.m0 fw for the C11x family */
+      { /* profile 0 */
+	/* ramp-up */
+	{ 31,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31, 27,  4,  0},
+	/* ramp-down */
+	{ 28, 31, 18,  8,  8, 13,  9, 13,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 1 */
+	/* ramp-up */
+	{ 31, 11,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31, 24,  0,  0},
+	/* ramp-down */
+	{ 10, 30, 30, 20,  8, 30,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 2 */
+	/* ramp-up */
+	{ 31, 19,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31, 16,  0,  0},
+	/* ramp-down */
+	{ 10, 30, 31, 24, 31,  2,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 3 */
+	/* ramp-up */
+	{ 31, 27,  0,  0,  0,  0,  0,  0,  0,  0,  0, 28, 23, 19,  0,  0},
+	/* ramp-down */
+	{ 31, 14, 31,  5, 24, 13, 10,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 4 */
+	/* ramp-up */
+	{ 31, 31,  4,  0,  0,  0,  0,  0,  0,  0,  0, 10, 21, 31,  0,  0},
+	/* ramp-down */
+	{ 20, 22, 31, 10, 22, 13, 10,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 5 */
+	/* ramp-up */
+	{ 31, 31, 13,  0,  0,  0,  0,  0,  0,  0,  0, 31, 22,  0,  0,  0},
+	/* ramp-down */
+	{ 22, 14, 26, 22, 22, 17,  5,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 6 */
+	/* ramp-up */
+	{ 31, 31, 21,  0,  0,  0,  0,  0,  0,  0,  0, 24, 21,  0,  0,  0},
+	/* ramp-down */
+	{ 10, 31, 31, 25, 17, 14,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 7 */
+	/* ramp-up */
+	{ 31, 31, 28,  0,  0,  0,  0,  0,  0,  0,  0, 28, 10,  0,  0,  0},
+	/* ramp-down */
+	{ 17, 24, 28, 21, 24, 14,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 8 */
+	/* ramp-up */
+	{ 31, 31, 31,  4,  0,  0,  0,  0,  0,  0,  0, 27,  4,  0,  0,  0},
+	/* ramp-down */
+	{  9, 23, 31, 24, 24, 13,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 9 */
+	/* ramp-up */
+	{ 31, 31, 31, 12,  0,  0,  0,  0,  0,  0,  0,  0, 13, 10,  0,  0},
+	/* ramp-down */
+	{  9, 23, 31, 24, 24, 13,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 10 */
+	/* ramp-up */
+	{ 31, 31, 31, 17,  0,  0,  0,  0,  0,  0,  0,  0, 12,  6,  0,  0},
+	/* ramp-down */
+	{ 10, 10, 31, 31, 24, 13,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 11 */
+	/* ramp-up */
+	{ 31, 31, 31, 21,  0,  0,  0,  0,  0,  0,  0,  0, 14,  0,  0,  0},
+	/* ramp-down */
+	{  4, 14, 31, 31, 26, 13,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 12 */
+	/* ramp-up */
+	{ 31, 31, 31, 27,  0,  0,  0,  0,  0,  0,  0,  0,  8,  0,  0,  0},
+	/* ramp-down */
+	{  2, 14, 31, 31, 28, 13,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 13 */
+	/* ramp-up */
+	{ 31, 31, 31, 29,  0,  0,  0,  0,  0,  0,  0,  0,  6,  0,  0,  0},
+	/* ramp-down */
+	{  0,  6, 14, 31, 31, 24, 13,  5,  4,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 14 */
+	/* ramp-up */
+	{ 31, 31, 31, 31,  1,  0,  0,  0,  0,  0,  0,  0,  3,  0,  0,  0},
+	/* ramp-down */
+	{  2,  4,  4, 18, 31, 31, 24,  5,  5,  4,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 15 */
+	/* ramp-up */
+	{ 31, 31, 31, 31,  0,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+	/* ramp-down */
+	{  3,  2,  2, 22, 22, 21, 21, 21,  9,  5,  0,  0,  0,  0,  0,  0},
+      },
+#elif defined(CONFIG_TARGET_C139)
       /* from Mot C139 official fw */
       { /* profile 0 */
 	/* ramp-up */
@@ -1278,7 +1476,105 @@
       },
     },
     { /* ramps */
-#ifdef CONFIG_TARGET_COMPAL
+#if defined(CONFIG_TARGET_C11X) || defined(CONFIG_TARGET_C155)
+      /* from Motorola R87.2.1.03.m0 fw for the C11x family */
+      { /* profile 0 */
+	/* ramp-up */
+	{ 28,  0,  0,  0,  0,  0,  0,  0,  0,  0,  4, 31, 31, 31,  3,  0},
+	/* ramp-down */
+	{ 31, 31, 18, 22,  6, 10,  2,  1,  1,  3,  3,  0,  0,  0,  0,  0},
+      },
+      { /* profile 1 */
+	/* ramp-up */
+	{ 31,  1,  0,  0,  0,  0,  0,  0,  0,  0,  3, 31, 31, 31,  0,  0},
+	/* ramp-down */
+	{ 31, 31, 31,  6,  8,  8,  9,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 2 */
+	/* ramp-up */
+	{ 31,  6,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31, 29,  0,  0},
+	/* ramp-down */
+	{ 31, 25, 21, 20, 13, 14,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 3 */
+	/* ramp-up */
+	{ 31, 13,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31, 22,  0,  0},
+	/* ramp-down */
+	{ 27, 28, 23, 19, 13, 14,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 4 */
+	/* ramp-up */
+	{ 31, 21,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31, 14,  0,  0},
+	/* ramp-down */
+	{ 31, 21, 31,  2, 31,  4,  8,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 5 */
+	/* ramp-up */
+	{ 31, 30,  0,  0,  0,  0,  0,  0,  0,  0,  0, 31, 31,  5,  0,  0},
+	/* ramp-down */
+	{ 21, 31, 31,  2, 31,  4,  8,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 6 */
+	/* ramp-up */
+	{ 31, 31,  7,  0,  0,  0,  0,  0,  0,  0,  0, 31, 28,  0,  0,  0},
+	/* ramp-down */
+	{ 31, 31, 28, 14,  3, 21,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 7 */
+	/* ramp-up */
+	{ 31, 31, 16,  0,  0,  0,  0,  0,  0,  0,  0, 31, 19,  0,  0,  0},
+	/* ramp-down */
+	{ 20, 30, 30, 10, 28, 10, 10,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 8 */
+	/* ramp-up */
+	{ 31, 31, 26,  0,  0,  0,  0,  0,  0,  0,  0, 31,  9,  0,  0,  0},
+	/* ramp-down */
+	{ 20, 26, 26, 18, 18, 20,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 9 */
+	/* ramp-up */
+	{ 31, 31, 31,  2,  0,  0,  0,  0,  0,  0,  0, 31,  2,  0,  0,  0},
+	/* ramp-down */
+	{ 16, 16, 26, 26, 26,  0,  0, 18,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 10 */
+	/* ramp-up */
+	{ 31, 31, 31, 11,  0,  0,  0,  0,  0,  0,  0,  0, 24,  0,  0,  0},
+	/* ramp-down */
+	{ 10, 12, 31, 26, 29, 20,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 11 */
+	/* ramp-up */
+	{ 31, 31, 31, 18,  0,  0,  0,  0,  0,  0,  0,  0, 17,  0,  0,  0},
+	/* ramp-down */
+	{  2, 20, 31, 26, 31,  0,  0, 18,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 12 */
+	/* ramp-up */
+	{ 31, 31, 31, 25,  0,  0,  0,  0,  0,  0,  0,  0, 10,  0,  0,  0},
+	/* ramp-down */
+	{  2, 20, 31, 26, 31,  0,  0,  0, 18,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 13 */
+	/* ramp-up */
+	{ 31, 31, 31, 30,  0,  0,  0,  0,  0,  0,  0,  0,  5,  0,  0,  0},
+	/* ramp-down */
+	{  1, 16, 31, 31, 31,  0, 18,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 14 */
+	/* ramp-up */
+	{ 31, 31, 31, 31,  0,  0,  0,  0,  0,  0,  0,  4,  0,  0,  0,  0},
+	/* ramp-down */
+	{  4,  8, 10, 20, 31, 31, 20,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 15 */
+	/* ramp-up */
+	{ 31, 31, 31, 31,  0,  0,  0,  0,  0,  0,  0,  4,  0,  0,  0,  0},
+	/* ramp-down */
+	{  4,  8, 10, 20, 31, 31, 20,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+#elif defined(CONFIG_TARGET_C139)
       /* from Mot C139 official fw */
       { /* profile 0 */
 	/* ramp-up */
@@ -1608,7 +1904,105 @@
       },
     },
     { /* ramps */
-#ifdef CONFIG_TARGET_COMPAL
+#if defined(CONFIG_TARGET_C11X) || defined(CONFIG_TARGET_C155)
+      /* from Motorola R87.2.1.03.m0 fw for the C11x family */
+      { /* profile 0 */
+	/* ramp-up */
+	{ 31,  4,  0,  0,  0,  0,  0,  0,  0,  0, 14, 31, 31, 17,  0,  0},
+	/* ramp-down */
+	{ 31, 31, 15, 25,  8, 10,  4,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 1 */
+	/* ramp-up */
+	{ 31,  8,  0,  0,  0,  0,  0,  0,  0,  0,  5, 31, 31, 22,  0,  0},
+	/* ramp-down */
+	{ 31, 21, 31, 20,  4,  0, 21,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 2 */
+	/* ramp-up */
+	{ 31, 16,  0,  0,  0,  0,  0,  0,  0,  0,  6, 31, 31, 13,  0,  0},
+	/* ramp-down */
+	{ 30, 31, 24, 31, 10,  2,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 3 */
+	/* ramp-up */
+	{ 31, 24,  0,  0,  0,  0,  0,  0,  0,  0,  3, 31, 31,  8,  0,  0},
+	/* ramp-down */
+	{ 31, 31, 19, 23, 24,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 4 */
+	/* ramp-up */
+	{ 31, 31,  2,  0,  0,  0,  0,  0,  0,  0,  6, 31, 22,  5,  0,  0},
+	/* ramp-down */
+	{ 31, 31, 14, 24,  5, 13, 10,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 5 */
+	/* ramp-up */
+	{ 31, 31, 10,  0,  0,  0,  0,  0,  0,  0,  0, 31, 25,  0,  0,  0},
+	/* ramp-down */
+	{ 31, 19, 20,  8, 24, 17,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 6 */
+	/* ramp-up */
+	{ 31, 30, 19,  0,  0,  0,  0,  0,  0,  0,  0, 31, 17,  0,  0,  0},
+	/* ramp-down */
+	{  2, 31, 31, 25, 17, 22,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 7 */
+	/* ramp-up */
+	{ 31, 31, 26,  0,  0,  0,  0,  0,  0,  0,  0, 31,  9,  0,  0,  0},
+	/* ramp-down */
+	{ 14, 24, 25, 30, 24, 11,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 8 */
+	/* ramp-up */
+	{ 31, 31, 31,  2,  0,  0,  0,  0,  0,  0,  0, 31,  2,  0,  0,  0},
+	/* ramp-down */
+	{ 12, 17, 27, 31, 24, 13,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 9 */
+	/* ramp-up */
+	{ 31, 31, 30, 10,  0,  0,  0,  0,  0,  0,  0, 25,  1,  0,  0,  0},
+	/* ramp-down */
+	{ 21, 31, 31, 26, 13,  4,  2,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 10 */
+	/* ramp-up */
+	{ 31, 31, 31, 11,  0,  0,  0,  0,  0,  0,  0, 24,  0,  0,  0,  0},
+	/* ramp-down */
+	{ 14, 31, 31, 28, 13,  5,  4,  2,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 11 */
+	/* ramp-up */
+	{ 31, 31, 31, 19,  0,  0,  0,  0,  0,  0,  0,  0, 16,  0,  0,  0},
+	/* ramp-down */
+	{  6, 14, 31, 31, 24, 13,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 12 */
+	/* ramp-up */
+	{ 31, 31, 31, 25,  0,  0,  0,  0,  0,  0,  0,  0, 10,  0,  0,  0},
+	/* ramp-down */
+	{  6, 14, 31, 31, 24, 13,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 13 */
+	/* ramp-up */
+	{ 31, 31, 31, 29,  0,  0,  0,  0,  0,  0,  0,  0,  6,  0,  0,  0},
+	/* ramp-down */
+	{  6, 14, 31, 31, 24, 13,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 14 */
+	/* ramp-up */
+	{ 31, 31, 31, 31,  1,  0,  0,  0,  0,  0,  0,  0,  3,  0,  0,  0},
+	/* ramp-down */
+	{  3, 16, 31, 31, 24, 14,  5,  4,  0,  0,  0,  0,  0,  0,  0,  0},
+      },
+      { /* profile 15 */
+	/* ramp-up */
+	{ 31, 31, 31, 31,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+	/* ramp-down */
+	{  4,  6, 21, 21, 21, 21, 15, 15,  4,  0,  0,  0,  0,  0,  0,  0},
+      },
+#elif defined(CONFIG_TARGET_C139)
       /* from Mot C139 official fw */
       { /* profile 0 */
 	/* ramp-up */
diff -r d3668a47b969 -r df9c471ce9e9 src/cs/layer1/tpu_drivers/source0/tpudrv12.c
--- a/src/cs/layer1/tpu_drivers/source0/tpudrv12.c	Thu Feb 07 00:11:43 2019 +0000
+++ b/src/cs/layer1/tpu_drivers/source0/tpudrv12.c	Sun Mar 10 20:28:06 2019 +0000
@@ -779,6 +779,7 @@
 	TSP_TO_RF(0x0002);
 	*TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
 	*TP_Ptr++ = TPU_WAIT(1);
+	/* by happenstance, no change is needed for Pirelli DP-L10 here */
 	*TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21);
 	*TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02);
 	*TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01);
@@ -800,7 +801,14 @@
 void l1dmacro_RF_wakeup  (void)
 {
 	TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
-	*TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01);
+	/*
+	 * Change from TI's original code, needed for Pirelli DP-L10:
+	 * configure TSPEN1 (upper nibble of TSP_SPI_SET1) for Rita just like
+	 * the original TSPEN2 config (lower nibble of TSP_SPI_SET2).
+	 * This change does not affect classic TI/OM/FC or Compal platforms
+	 * as they don't use TSPEN1.
+	 */
+	*TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x61);
 	*TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
 	*TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01);
 	*TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR);
@@ -870,7 +878,14 @@
    *TP_Ptr++ = TPU_SYNC(0);
 
    /* from disassembly, differs from LoCosto version */
-   *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x20);
+   /*
+    * Change from TI's original code, needed for Pirelli DP-L10:
+    * configure TSPEN1 (upper nibble of TSP_SPI_SET1) for Rita just like
+    * the original TSPEN2 config (lower nibble of TSP_SPI_SET2).
+    * This change does not affect classic TI/OM/FC or Compal platforms
+    * as they don't use TSPEN1.
+    */
+   *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x60);
    *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
    *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET3, 0x00);
 
diff -r d3668a47b969 -r df9c471ce9e9 src/cs/layer1/tpu_drivers/source0/tpudrv12.h
--- a/src/cs/layer1/tpu_drivers/source0/tpudrv12.h	Thu Feb 07 00:11:43 2019 +0000
+++ b/src/cs/layer1/tpu_drivers/source0/tpudrv12.h	Sun Mar 10 20:28:06 2019 +0000
@@ -316,6 +316,60 @@
   #define TU_1900    ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
   #define TD_1900    ( PA_OFF     | FEM_PINS ^ 0     )
 
+#elif defined(CONFIG_TARGET_FCFAM)
+
+  /*
+   * In our FreeCalypso hw family, we would like to be able to use
+   * both triband and quadband RFFEs.  Our current FCDEV3B is triband,
+   * copied from Openmoko, and the same is expected to be the case for
+   * future low-cost designs, but if someone pays for a new RF layout,
+   * we can use a quadband RFFE instead.  If we ever have two different
+   * hw platforms or variants that differ in the RFFE but are otherwise
+   * firmware-compatible, we would like to have the same fw build
+   * work with both triband and quadband RFFEs.  How is it possible?
+   * The trick is that we define our set of TSPACT RFFE control signals
+   * starting with our current OM-based triband version, and add one
+   * more signal to support potential future quadband designs.
+   */
+
+  #define FEM_RX_1900   BIT_1     // act1
+  #define FEM_TX_HIGH   BIT_2     // act2
+  #define FEM_TX_LOW    BIT_4     // act4
+  #define FEM_RX_850    BIT_5     // act5
+
+  #define PA_HI_BAND    BIT_3   // act3
+  #define PA_LO_BAND    0
+  #define PA_OFF        0
+
+  #define FEM_PINS (FEM_TX_LOW | FEM_TX_HIGH | FEM_RX_850 | FEM_RX_1900)
+
+  #define FEM_OFF    ( FEM_PINS ^ 0 )
+
+  #define FEM_SLEEP  ( 0 )  
+
+  // This configuration is always inverted.
+
+  // RX_UP/DOWN and TX_UP/DOWN
+  #define RU_900     ( PA_OFF     | FEM_PINS ^ 0          )
+  #define RD_900     ( PA_OFF     | FEM_PINS ^ 0          )
+  #define TU_900     ( PA_LO_BAND | FEM_PINS ^ FEM_TX_LOW )
+  #define TD_900     ( PA_OFF     | FEM_PINS ^ 0          )
+
+  #define RU_850     ( PA_OFF     | FEM_PINS ^ FEM_RX_850 )
+  #define RD_850     ( PA_OFF     | FEM_PINS ^ 0          )
+  #define TU_850     ( PA_LO_BAND | FEM_PINS ^ FEM_TX_LOW )
+  #define TD_850     ( PA_OFF     | FEM_PINS ^ 0          )
+
+  #define RU_1800    ( PA_OFF     | FEM_PINS ^ 0           )
+  #define RD_1800    ( PA_OFF     | FEM_PINS ^ 0           )
+  #define TU_1800    ( PA_HI_BAND | FEM_PINS ^ FEM_TX_HIGH )
+  #define TD_1800    ( PA_OFF     | FEM_PINS ^ 0           )
+
+  #define RU_1900    ( PA_OFF     | FEM_PINS ^ FEM_RX_1900 )
+  #define RD_1900    ( PA_OFF     | FEM_PINS ^ 0           )
+  #define TU_1900    ( PA_HI_BAND | FEM_PINS ^ FEM_TX_HIGH )
+  #define TD_1900    ( PA_OFF     | FEM_PINS ^ 0           )
+
 #elif defined(CONFIG_TARGET_PIRELLI)
 
   #define ANTSW_RX_PCS	BIT_4