comparison src/cs/layer1/tpu_drivers/source0/tpudrv12.h @ 153:df9c471ce9e9

l1_rf12.c and tpudrv12.[ch]: updates from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 10 Mar 2019 20:28:06 +0000
parents b6a5e36de839
children a911ac771094
comparison
equal deleted inserted replaced
152:d3668a47b969 153:df9c471ce9e9
314 #define RU_1900 ( PA_OFF | FEM_PINS ^ FEM_8 ) 314 #define RU_1900 ( PA_OFF | FEM_PINS ^ FEM_8 )
315 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 ) 315 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
316 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 ) 316 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
317 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 ) 317 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
318 318
319 #elif defined(CONFIG_TARGET_FCFAM)
320
321 /*
322 * In our FreeCalypso hw family, we would like to be able to use
323 * both triband and quadband RFFEs. Our current FCDEV3B is triband,
324 * copied from Openmoko, and the same is expected to be the case for
325 * future low-cost designs, but if someone pays for a new RF layout,
326 * we can use a quadband RFFE instead. If we ever have two different
327 * hw platforms or variants that differ in the RFFE but are otherwise
328 * firmware-compatible, we would like to have the same fw build
329 * work with both triband and quadband RFFEs. How is it possible?
330 * The trick is that we define our set of TSPACT RFFE control signals
331 * starting with our current OM-based triband version, and add one
332 * more signal to support potential future quadband designs.
333 */
334
335 #define FEM_RX_1900 BIT_1 // act1
336 #define FEM_TX_HIGH BIT_2 // act2
337 #define FEM_TX_LOW BIT_4 // act4
338 #define FEM_RX_850 BIT_5 // act5
339
340 #define PA_HI_BAND BIT_3 // act3
341 #define PA_LO_BAND 0
342 #define PA_OFF 0
343
344 #define FEM_PINS (FEM_TX_LOW | FEM_TX_HIGH | FEM_RX_850 | FEM_RX_1900)
345
346 #define FEM_OFF ( FEM_PINS ^ 0 )
347
348 #define FEM_SLEEP ( 0 )
349
350 // This configuration is always inverted.
351
352 // RX_UP/DOWN and TX_UP/DOWN
353 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
354 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
355 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_TX_LOW )
356 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
357
358 #define RU_850 ( PA_OFF | FEM_PINS ^ FEM_RX_850 )
359 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
360 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_TX_LOW )
361 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
362
363 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
364 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
365 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_TX_HIGH )
366 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
367
368 #define RU_1900 ( PA_OFF | FEM_PINS ^ FEM_RX_1900 )
369 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
370 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_TX_HIGH )
371 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
372
319 #elif defined(CONFIG_TARGET_PIRELLI) 373 #elif defined(CONFIG_TARGET_PIRELLI)
320 374
321 #define ANTSW_RX_PCS BIT_4 375 #define ANTSW_RX_PCS BIT_4
322 #define ANTSW_TX_HIGH BIT_10 376 #define ANTSW_TX_HIGH BIT_10
323 #define ANTSW_TX_LOW BIT_11 377 #define ANTSW_TX_LOW BIT_11