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comparison src/g23m-aci/uart/uart_txs.c @ 1:d393cd9bb723

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src/g23m-*: initial import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Jul 2018 04:40:46 +0000
parents
children 143f3a07e273
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0:b6a5e36de839 1:d393cd9bb723
1 /*
2 +-----------------------------------------------------------------------------
3 | Project :
4 | Modul :
5 +-----------------------------------------------------------------------------
6 | Copyright 2002 Texas Instruments Berlin, AG
7 | All rights reserved.
8 |
9 | This file is confidential and a trade secret of Texas
10 | Instruments Berlin, AG
11 | The receipt of or possession of this file does not convey
12 | any rights to reproduce or disclose its contents or to
13 | manufacture, use, or sell anything it may describe, in
14 | whole, or in part, without the specific written consent of
15 | Texas Instruments Berlin, AG.
16 +-----------------------------------------------------------------------------
17 | Purpose : This modul is part of the entity UART and implements all
18 | functions to handles the incoming process internal signals as
19 | described in the SDL-documentation (TX-statemachine)
20 +-----------------------------------------------------------------------------
21 */
22
23 #ifndef UART_TXS_C
24 #define UART_TXS_C
25 #endif /* !UART_TXS_C */
26
27 #define ENTITY_UART
28
29 #ifndef FF_MULTI_PORT
30 /*==== INCLUDES =============================================================*/
31
32 #ifdef WIN32
33 #include "nucleus.h"
34 #endif /* WIN32 */
35 #include "typedefs.h" /* to get Condat data types */
36 #include "vsi.h" /* to get a lot of macros */
37 #include "macdef.h" /* to get a lot of macros */
38 #include "custom.h"
39 #include "gsm.h" /* to get a lot of macros */
40 #include "cnf_uart.h" /* to get cnf-definitions */
41 #include "mon_uart.h" /* to get mon-definitions */
42 #include "prim.h" /* to get the definitions of used SAP and directions */
43 #ifdef DTILIB
44 #include "dti.h" /* to get dti lib */
45 #endif /* DTILIB */
46 #include "pei.h" /* to get PEI interface */
47 #ifdef _TARGET_
48 #include "uart/serialswitch.h"
49 #include "uart/traceswitch.h"
50 #else /* _TARGET_ */
51 #include "serial_dat.h" /* to get definitions of serial driver */
52 #endif /* _TARGET_ */
53 #include "uart.h" /* to get the global entity definitions */
54
55 #include "uart_txf.h" /* to get tx functions */
56
57 #include "uart_kers.h" /* to get ker signals */
58 #include "uart_drxs.h" /* to get drx signals */
59
60 #ifdef _SIMULATION_
61 #include <stdio.h> /* to get sprintf */
62 #include "uart_txp.h" /* to get tx_writedata */
63 #endif /* _SIMULATION_ */
64
65 /*==== CONST ================================================================*/
66
67 /*==== LOCAL VARS ===========================================================*/
68
69 /*==== PRIVATE FUNCTIONS ====================================================*/
70
71 /*==== PUBLIC FUNCTIONS =====================================================*/
72
73
74
75 /*
76 +------------------------------------------------------------------------------
77 | Function : sig_ker_tx_dead_mode_req
78 +------------------------------------------------------------------------------
79 | Description : Handles the internal signal SIG_KER_TX_DEAD_MODE_REQ. If this
80 | signal is called the service expectes an disabled UART to work
81 | correctly.
82 |
83 | Parameters : no parameters
84 |
85 +------------------------------------------------------------------------------
86 */
87 GLOBAL void sig_ker_tx_dead_mode_req ()
88 {
89 TRACE_ISIG( "sig_ker_tx_dead_mode_req" );
90
91 uart_data->tx.lines = 0x80000000; /* invalid */
92 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
93 uart_data->tx.p_zero = 0;
94 uart_data->tx.send_state = UART_TX_NOT_SENDING;
95
96 switch( GET_STATE( UART_SERVICE_TX ) )
97 {
98 case TX_READY:
99 case TX_MUX:
100 SET_STATE( UART_SERVICE_TX, TX_DEAD );
101 break;
102
103 case TX_DEAD:
104 break;
105
106 default:
107 TRACE_ERROR( "SIG_KER_TX_DEAD_MODE_REQ unexpected" );
108 break;
109 }
110 } /* sig_ker_tx_dead_mode_req() */
111
112
113
114 /*
115 +------------------------------------------------------------------------------
116 | Function : sig_ker_tx_ready_mode_req
117 +------------------------------------------------------------------------------
118 | Description : Handles the internal signal SIG_KER_TX_READY_MODE_REQ.
119 |
120 | Parameters : no parameters
121 |
122 +------------------------------------------------------------------------------
123 */
124 GLOBAL void sig_ker_tx_ready_mode_req ()
125 {
126 TRACE_ISIG( "sig_ker_tx_ready_mode_req" );
127
128
129 switch( GET_STATE( UART_SERVICE_TX ) )
130 {
131 case TX_DEAD:
132 SET_STATE( UART_SERVICE_TX, TX_READY );
133 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
134 uart_data->tx.send_state = UART_TX_NOT_SENDING;
135 break;
136
137 case TX_MUX:
138 SET_STATE( UART_SERVICE_TX, TX_READY );
139 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
140 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
141 break;
142
143 case TX_READY:
144 break;
145
146 default:
147 TRACE_ERROR( "SIG_KER_TX_READY_MODE_REQ unexpected" );
148 break;
149 }
150 } /* sig_ker_tx_ready_mode_req() */
151
152
153
154 /*
155 +------------------------------------------------------------------------------
156 | Function : sig_ker_tx_mux_mode_req
157 +------------------------------------------------------------------------------
158 | Description : Handles the internal signal SIG_KER_TX_MUX_MODE_REQ
159 |
160 | Parameters : no parameters
161 |
162 +------------------------------------------------------------------------------
163 */
164 GLOBAL void sig_ker_tx_mux_mode_req ()
165 {
166 TRACE_ISIG( "sig_ker_tx_mux_mode_req" );
167
168 switch( GET_STATE( UART_SERVICE_TX ) )
169 {
170 case TX_DEAD:
171 SET_STATE( UART_SERVICE_TX, TX_MUX );
172 uart_data->tx.send_state = UART_TX_NOT_SENDING;
173 break;
174
175 case TX_READY:
176 SET_STATE( UART_SERVICE_TX, TX_MUX );
177 break;
178
179 case TX_MUX:
180 break;
181
182 default:
183 TRACE_ERROR( "SIG_KER_TX_MUX_MODE_REQ unexpected" );
184 break;
185 }
186 } /* sig_ker_tx_mux_mode_req() */
187
188
189
190 /*
191 +------------------------------------------------------------------------------
192 | Function : sig_drx_tx_data_available_ind
193 +------------------------------------------------------------------------------
194 | Description : Handles the internal signal SIG_DRX_TX_DATA_AVAILABLE_IND
195 |
196 | Parameters : dlc_instance - dlc instance wich belongs to calling DRX
197 | transmit_data - descriptors to transmit
198 | transmit_pos - position to start tranmission in first desc
199 |
200 +------------------------------------------------------------------------------
201 */
202 GLOBAL void sig_drx_tx_data_available_ind (UBYTE dlc_instance,
203 T_desc2* transmit_data,
204 USHORT transmit_pos)
205 {
206 T_DLC* dlc;
207
208 TRACE_ISIG( "sig_drx_tx_data_available_ind" );
209
210 dlc = &uart_data->dlc_table[dlc_instance];
211 dlc->transmit_data = transmit_data;
212 dlc->transmit_pos = transmit_pos;
213 dlc->p_counter = dlc->priority + uart_data->tx.p_zero;
214
215 switch( GET_STATE( UART_SERVICE_TX ) )
216 {
217 case TX_READY:
218 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
219 {
220 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
221 /*
222 * inform dlc about sending
223 */
224 if(dlc->transmit_data EQ NULL)
225 {
226 /*
227 * no more data
228 */
229 break;
230 }
231 uart_data->tx.send_state = UART_TX_SENDING;
232 uart_data->drx = dlc->drx;
233 sig_tx_drx_sending_req();
234 /*
235 * transmit data
236 */
237 if(uart_data EQ (&(uart_data_base[0])))
238 {
239 TRACE_EVENT("UF_WriteData()");
240 #ifdef _SIMULATION_
241 tx_writedata(0);
242 #else /* _SIMULATION_ */
243 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
244 #endif /* else _SIMULATION_ */
245 }
246 #ifdef FF_TWO_UART_PORTS
247 else if(uart_data EQ (&(uart_data_base[1])))
248 {
249 TRACE_EVENT("UF_WriteData()");
250 #ifdef _SIMULATION_
251 tx_writedata(1);
252 #else /* _SIMULATION_ */
253 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
254 #endif /* else _SIMULATION_ */
255 }
256 #endif /* FF_TWO_UART_PORTS */
257 else
258 {
259 TRACE_ERROR("wrong value of uart_data");
260 }
261 }
262 break;
263
264 case TX_MUX:
265 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
266 {
267 /*
268 * determine next dlc allow to send
269 */
270 tx_next_send_allowed();
271 /*
272 * inform dlc about sending
273 */
274 if(uart_data->tx.dlc_instance EQ UART_EMPTY_INSTANCE)
275 {
276 /*
277 * queue empty
278 */
279 break;
280 }
281 dlc = &uart_data->dlc_table[uart_data->tx.dlc_instance];
282 uart_data->tx.send_state = UART_TX_SENDING;
283 if(uart_data->tx.dlc_instance EQ UART_CONTROL_INSTANCE)
284 {
285 /*
286 * Control channel
287 */
288 sig_tx_ker_sending_ind();
289 }
290 else
291 {
292 /*
293 * Data channel
294 */
295 uart_data->drx = dlc->drx;
296 sig_tx_drx_sending_req();
297 }
298 /*
299 * transmit data
300 */
301 #ifndef _SIMULATION_
302 tx_flushUart();
303 #endif /* !_SIMULATION_ */
304 if(uart_data EQ (&(uart_data_base[0])))
305 {
306 TRACE_EVENT("UF_WriteData()");
307 #ifdef _SIMULATION_
308 tx_writedata(0);
309 #else /* _SIMULATION_ */
310 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
311 #endif /* else _SIMULATION_ */
312 }
313 #ifdef FF_TWO_UART_PORTS
314 else if(uart_data EQ (&(uart_data_base[1])))
315 {
316 TRACE_EVENT("UF_WriteData()");
317 #ifdef _SIMULATION_
318 tx_writedata(1);
319 #else /* _SIMULATION_ */
320 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
321 #endif /* else _SIMULATION_ */
322 }
323 #endif /* FF_TWO_UART_PORTS */
324 else
325 {
326 TRACE_ERROR("wrong value of uart_data");
327 }
328 }
329 break;
330
331 default:
332 TRACE_ERROR( "SIG_DRX_TX_DATA_AVAILABLE_IND unexpected" );
333 break;
334 }
335 } /* sig_drx_tx_data_available_ind() */
336
337
338
339 /*
340 +------------------------------------------------------------------------------
341 | Function : sig_ker_tx_data_available_req
342 +------------------------------------------------------------------------------
343 | Description : Handles the internal signal SIG_KER_TX_DATA_AVAILABLE_REQ
344 |
345 | Parameters : transmit_data - descriptors to transmit
346 | transmit_pos - position to start tranmission in first desc
347 |
348 +------------------------------------------------------------------------------
349 */
350 GLOBAL void sig_ker_tx_data_available_req (T_desc2* transmit_data,
351 USHORT transmit_pos)
352 {
353 T_DLC* dlc;
354
355 TRACE_ISIG( "sig_ker_tx_data_available_req" );
356
357 dlc = &uart_data->dlc_table[UART_CONTROL_INSTANCE];
358 dlc->transmit_data = transmit_data;
359 dlc->transmit_pos = transmit_pos;
360 dlc->p_counter = dlc->priority + uart_data->tx.p_zero;
361
362 #ifdef _SIMULATION_
363 if(transmit_data->len)
364 {
365 USHORT i;
366 USHORT pos;
367 char buf[90];
368 /*
369 * trace output
370 */
371 TRACE_EVENT("====== OUT");
372 i = 0;
373 pos = 0;
374 while(pos < transmit_data->len)
375 {
376 i+= sprintf(&buf[i], "0x%02x, ", transmit_data->buffer[pos]);
377 pos++;
378 if(i > 80)
379 {
380 TRACE_EVENT( buf );
381 i = 0;
382 }
383 else if(pos >= transmit_data->len)
384 {
385 TRACE_EVENT( buf );
386 }
387 }
388 }
389 #endif /* _SIMULATION_ */
390
391 switch( GET_STATE( UART_SERVICE_TX ) )
392 {
393 case TX_MUX:
394 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
395 {
396 /*
397 * determine next dlc allow to send
398 */
399 tx_next_send_allowed();
400 /*
401 * inform dlc about sending
402 */
403 if(uart_data->tx.dlc_instance == UART_EMPTY_INSTANCE)
404 {
405 /*
406 * queue empty
407 */
408 break;
409 }
410 uart_data->tx.send_state = UART_TX_SENDING;
411 dlc = &uart_data->dlc_table[uart_data->tx.dlc_instance];
412 if(uart_data->tx.dlc_instance EQ UART_CONTROL_INSTANCE)
413 {
414 /*
415 * Control channel
416 */
417 sig_tx_ker_sending_ind();
418 }
419 else
420 {
421 /*
422 * Data channel
423 */
424 uart_data->drx = dlc->drx;
425 sig_tx_drx_sending_req();
426 }
427 /*
428 * transmit data
429 */
430 #ifndef _SIMULATION_
431 tx_flushUart();
432 #endif /* !_SIMULATION_ */
433 if(uart_data EQ (&(uart_data_base[0])))
434 {
435 TRACE_EVENT("UF_WriteData()");
436 #ifdef _SIMULATION_
437 tx_writedata(0);
438 #else /* _SIMULATION_ */
439 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
440 #endif /* else _SIMULATION_ */
441 }
442 #ifdef FF_TWO_UART_PORTS
443 else if(uart_data EQ (&(uart_data_base[1])))
444 {
445 TRACE_EVENT("UF_WriteData()");
446 #ifdef _SIMULATION_
447 tx_writedata(1);
448 #else /* _SIMULATION_ */
449 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
450 #endif /* else _SIMULATION_ */
451 }
452 #endif /* FF_TWO_UART_PORTS */
453 else
454 {
455 TRACE_ERROR("wrong value of uart_data");
456 }
457 }
458 break;
459
460 default:
461 TRACE_ERROR( "SIG_KER_TX_DATA_AVAILABLE_REQ unexpected" );
462 break;
463 }
464 } /* sig_ker_tx_data_available_req() */
465
466
467
468 /*
469 +------------------------------------------------------------------------------
470 | Function : sig_drx_tx_data_not_available_ind
471 +------------------------------------------------------------------------------
472 | Description : Handles the internal signal SIG_DRX_TX_DATA_NOT_AVAILABLE_IND
473 |
474 | Parameters : dlc_instance - dlc instance wich belongs to calling DRX
475 |
476 +------------------------------------------------------------------------------
477 */
478 GLOBAL void sig_drx_tx_data_not_available_ind (UBYTE dlc_instance)
479 {
480 TRACE_ISIG( "sig_drx_tx_data_not_available_ind" );
481
482 uart_data->dlc_table[dlc_instance].transmit_data = NULL;
483 } /* sig_drx_tx_data_not_available_ind() */
484
485
486
487 /*
488 +------------------------------------------------------------------------------
489 | Function : sig_ker_tx_data_not_available_req
490 +------------------------------------------------------------------------------
491 | Description : Handles the internal signal SIG_KER_TX_DATA_NOT_AVAILABLE_REQ
492 |
493 | Parameters : no parameters
494 |
495 +------------------------------------------------------------------------------
496 */
497 GLOBAL void sig_ker_tx_data_not_available_req ()
498 {
499 TRACE_ISIG( "sig_ker_tx_data_not_available_req" );
500
501 uart_data->dlc_table[UART_CONTROL_INSTANCE].transmit_data = NULL;
502 } /* sig_ker_tx_data_not_available_req() */
503
504
505
506 /*
507 +------------------------------------------------------------------------------
508 | Function : sig_ker_tx_line_states_req
509 +------------------------------------------------------------------------------
510 | Description : Handles the internal signal SIG_KER_TX_LINE_STATES_REQ
511 |
512 | Parameters : dlc_instance - DLC which contains new line states
513 |
514 +------------------------------------------------------------------------------
515 */
516 GLOBAL void sig_ker_tx_line_states_req (UBYTE dlc_instance)
517 {
518 T_DLC* dlc;
519 SHORT ret = 0; /* Error returned from a function */
520
521 TRACE_ISIG( "sig_ker_tx_line_states_req" );
522
523 /*
524 * set DLC
525 */
526 dlc = &uart_data->dlc_table[dlc_instance];
527
528 /*
529 * UART number has to be checked.
530 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
531 * flow control is not supported.
532 * DCD and DTR are not supported on UART Irda on C & D-Sample.
533 */
534 if((uart_data->tx.lines != dlc->lines))
535 {
536 /*
537 * set new line states separatly because
538 * if one line is not supported by the driver
539 * we can still set the other lines
540 */
541 if(dlc->lines & UART_SA_TX_MASK)
542 {
543 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(SA_MASK),
544 (ULONG)(SA_MASK))) != UF_OK) &&
545 (uart_data->device != 0))
546 {
547 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
548 ret, __LINE__);
549 }
550 }
551 else
552 {
553 if(((ret = UF_SetLineState(uart_data->device, 0,
554 (ULONG)(SA_MASK))) != UF_OK) &&
555 (uart_data->device != 0))
556 {
557 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
558 ret, __LINE__);
559 }
560 }
561
562 if(dlc->lines & UART_SB_TX_MASK) /* also DCD */
563 {
564 if(((ret = UF_SetLineState(uart_data->device, 0,
565 (ULONG)(SB_MASK))) != UF_OK) &&
566 (uart_data->device != 0))
567 {
568 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
569 ret, __LINE__);
570 }
571 }
572 else
573 {
574 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(SB_MASK),
575 (ULONG)(SB_MASK))) != UF_OK) &&
576 (uart_data->device != 0))
577 {
578 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
579 ret, __LINE__);
580 }
581 }
582
583 if(dlc->lines & UART_X_TX_MASK)
584 {
585 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(X_MASK),
586 (ULONG)(X_MASK))) != UF_OK) &&
587 (uart_data->device != 0))
588 {
589 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
590 ret, __LINE__);
591 }
592 }
593 else
594 {
595 if(((ret = UF_SetLineState(uart_data->device, 0,
596 (ULONG)(X_MASK))) != UF_OK) &&
597 (uart_data->device != 0))
598 {
599 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
600 ret, __LINE__);
601 }
602 }
603
604 if(dlc->lines & UART_RI_MASK)
605 {
606 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(RI_MASK),
607 (ULONG)(RI_MASK))) != UF_OK) &&
608 (uart_data->device != 0))
609 {
610 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
611 ret, __LINE__);
612 }
613 }
614 else
615 {
616 if(((ret = UF_SetLineState(uart_data->device, 0,
617 (ULONG)(RI_MASK))) != UF_OK) &&
618 (uart_data->device != 0))
619 {
620 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
621 ret, __LINE__);
622 }
623 }
624
625 if(dlc->lines & UART_BRK_TX_MASK)
626 {
627 /*
628 * send break
629 */
630 if(((ret = UF_SetLineState(uart_data->device,
631 (ULONG)((1UL<<BRK) |
632 (((dlc->lines & UART_BRKLEN_TX_MASK)
633 >> UART_BRKLEN_TX_POS)
634 << BRKLEN)),
635 (ULONG)(BRK_MASK | BRK_LEN_MASK))) != UF_OK)
636 && (uart_data->device != 0))
637 {
638 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
639 ret, __LINE__);
640 }
641 /*
642 * break sent, so clear break flag
643 */
644 dlc->lines&= ~UART_BRK_TX_MASK;
645 }
646 uart_data->tx.lines = dlc->lines;
647 }
648 } /* sig_ker_tx_line_states_req() */
649
650
651
652 /*
653 +------------------------------------------------------------------------------
654 | Function : sig_ker_tx_flush_req
655 +------------------------------------------------------------------------------
656 | Description : Handles the internal signal SIG_KER_TX_FLUSH_REQ
657 |
658 | Parameters : no parameters
659 |
660 +------------------------------------------------------------------------------
661 */
662 GLOBAL void sig_ker_tx_flush_req ()
663 {
664 TRACE_ISIG( "sig_ker_tx_flush_req" );
665
666 switch( GET_STATE( UART_SERVICE_TX ) )
667 {
668 case TX_READY:
669 case TX_MUX:
670 #ifndef _SIMULATION_
671 tx_flushUart();
672 #endif /* !_SIMULATION_ */
673 sig_tx_ker_flushed_ind();
674 break;
675
676 default:
677 TRACE_ERROR( "SIG_KER_TX_FLUSH_REQ unexpected" );
678 break;
679 }
680 } /* sig_ker_tx_flush_req() */
681
682
683
684 /*
685 +------------------------------------------------------------------------------
686 | Function : sig_ker_tx_restart_write_req
687 +------------------------------------------------------------------------------
688 | Description : Handles the internal signal SIG_KER_TX_RESTART_WRITE_REQ
689 |
690 | Parameters : no parameters
691 |
692 +------------------------------------------------------------------------------
693 */
694 GLOBAL void sig_ker_tx_restart_write_req ()
695 {
696 TRACE_ISIG( "sig_ker_tx_restart_write_req" );
697
698 switch( GET_STATE( UART_SERVICE_TX ) )
699 {
700 case TX_READY:
701 case TX_MUX:
702 if(uart_data->tx.send_state EQ UART_TX_SENDING)
703 {
704 /*
705 * restart writeInFunc
706 */
707 #ifndef _SIMULATION_
708 tx_flushUart();
709 #endif /* !_SIMULATION_ */
710 if(uart_data EQ (&(uart_data_base[0])))
711 {
712 TRACE_EVENT("UF_WriteData()");
713 #ifdef _SIMULATION_
714 tx_writedata(0);
715 #else /* _SIMULATION_ */
716 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
717 #endif /* else _SIMULATION_ */
718 }
719 #ifdef FF_TWO_UART_PORTS
720 else if(uart_data EQ (&(uart_data_base[1])))
721 {
722 TRACE_EVENT("UF_WriteData()");
723 #ifdef _SIMULATION_
724 tx_writedata(1);
725 #else /* _SIMULATION_ */
726 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
727 #endif /* else _SIMULATION_ */
728 }
729 #endif /* FF_TWO_UART_PORTS */
730 else
731 {
732 TRACE_ERROR("wrong value of uart_data");
733 }
734 }
735 break;
736
737 default:
738 TRACE_ERROR( "SIG_KER_TX_RESTART_WRITE_REQ unexpected" );
739 break;
740 }
741 } /* sig_ker_tx_restart_write_req() */
742 #endif /* !FF_MULTI_PORT */