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comparison src/cs/layer1/dyn_dwl_include/l1_dyn_dwl_defty.h @ 0:b6a5e36de839

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src/cs: initial import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Jul 2018 04:39:26 +0000
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-1:000000000000 0:b6a5e36de839
1 /************* Revision Controle System Header *************
2 * GSM Layer 1 software
3 * L1_DYN_DWL_DEFTY.H
4 *
5 * Filename l1_dyn_dwl_defty.h
6 * Copyright 2004 (C) Texas Instruments
7 *
8 ************* Revision Controle System Header *************/
9 #if(L1_DYN_DSP_DWNLD==1)
10
11 #ifndef _L1_DYN_DWL_DEFTY_H_
12 #define _L1_DYN_DWL_DEFTY_H_
13
14 #include "l1_dyn_dwl_const.h"
15
16 /***************************************************************************************/
17 /* Dynamic download L1A structure to store dynamic download L1A global variables */
18 /***************************************************************************************/
19 typedef struct
20 {
21 UWORD32 signal_code_vect[MAX_NUM_OF_PATCH_IDS];
22 UWORD32 num_of_elem;
23 }T_FIFO_DYN_DWNLD ;
24 typedef struct
25 {
26 UWORD8 state;
27 UWORD16 num_patches_installed;
28 UWORD16 patch_id[MAX_NUM_OF_PATCH_IDS];
29 UWORD16 num_of_elem_to_copy;
30 UWORD16 next_patch_id[MAX_NUM_OF_PATCH_IDS];
31 BOOL semaphore_vect[MAX_NUM_OF_SEMAPHORES];
32 BOOL melody0_E2_flag_activated;
33 BOOL melody1_E2_flag_activated;
34 UWORD16 dsp_trace_level_copy;
35 BOOL trace_flag_blocked;
36 UWORD16 num_of_primitives;
37 BOOL dedicated_stop_flag;
38 T_FIFO_DYN_DWNLD waiting_patch_fifo;
39 }T_L1A_DYN_DWNLD_GLOBAL;
40
41 /***************************************************************************************/
42 /* Dynamic DSP L1A-L1S structure... */
43 /***************************************************************************************/
44 typedef struct
45 {
46 BOOL start;
47 BOOL stop;
48 } T_DYN_DWNLD_TASK_COMMAND;
49
50 /***************************************************************************************/
51 /* Dynamic DSP download HISR - L1A structure... */
52 /***************************************************************************************/
53 typedef struct
54 {
55 BOOL restart;
56 } T_DYN_DWNLD_HISR_COMMAND;
57
58 typedef struct
59 {
60 UWORD16 num_of_elem;
61 UWORD32 address[MAX_NUM_OF_PATCH_IDS];
62 } T_DYN_DWNLD_HISR_UN_PARAM;
63
64 typedef struct
65 {
66 UWORD32 start_MCU_copy_address[MAX_NUM_OF_PATCH_IDS];
67 UWORD16 size_of_dwnld_area;
68 UWORD16 start_of_dwnld_area;
69 UWORD16 num_of_elem;
70 UWORD32 address_to_install[MAX_NUM_OF_PATCH_IDS];
71 UWORD16 crc[MAX_NUM_OF_PATCH_IDS];
72 UWORD16 size_array[MAX_NUM_OF_PATCH_IDS];
73 }T_DYN_DWNLD_HISR_CPY_PARAM;
74
75 typedef struct
76 {
77 T_DYN_DWNLD_HISR_COMMAND command;
78 T_DYN_DWNLD_HISR_UN_PARAM uninstall_parameters;
79 T_DYN_DWNLD_HISR_CPY_PARAM copy_parameters;
80 } T_L1A_DYN_DWNLD_HISR_COM;
81
82 /***************************************************************************************/
83 /* Dynamic download HISR structure to store dynamic download HISR global variables */
84 /***************************************************************************************/
85
86 typedef struct
87 {
88 UWORD8 state;
89 BOOL running;
90 UWORD16 uninstall_counter;
91 UWORD16 patch_ids_counter;
92 UWORD32 running_source_pointer;
93 UWORD16 tmp_patch_size;
94 } T_L1_DYN_DWNLD_API_HISR;
95
96 /***************************************************************************************/
97 /* Dynamic Download MCU-DSP API */
98 /***************************************************************************************/
99 typedef struct
100 {
101 API d_api_dwl_download_ctrl;
102 API d_api_dwl_error_code;
103 API d_api_dwl_function_address[2];
104 API d_api_dwl_crc;
105 API d_api_dwl_size;
106 API d_api_dwl_write_pointer;
107 } T_DYN_DWNLD_MCU_DSP;
108
109 typedef struct
110 {
111 UWORD32 primitive;
112 UWORD16 msg_id;
113 }T_SIGNAL_PATCH;
114
115 #define GPRS_PATCH 0
116 #define AMR_SCH_PATCH 1
117 #define TTY_PATCH 2
118 #define AMR_MMS_PATCH 3
119 #define E2_PATCH 4
120
121
122 #define DEDI_STATE_MACHINE 0
123 #define TTY_STATE_MACHINE 1
124 #define E2_STATE_MACHINE 2
125 #define VOICE_MEMO_AMR_SM 3
126 #define VOICE_PLAY_AMR_SM 4
127 #define SPEECH_RECO_SM 5
128
129 #endif // _L1_DYN_DWL_DEFTY_H_
130 #endif // L1_DYN_DSP_DWNLD
131