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src/cs: initial import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Jul 2018 04:39:26 +0000
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children 9029c222c426
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-1:000000000000 0:b6a5e36de839
1 /******************************************************************************
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
6 product is protected under copyright law and trade secret law as an
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
8 rights reserved.
9
10
11 Filename : niq32.c
12
13 Description : Nucleus IQ initializations
14
15 Project : Drivers
16
17 Author : proussel@ti.com Patrick Roussel.
18
19 Version number : 1.25
20
21 Date : 08/22/03
22
23 Previous delta : 12/19/00 14:24:51
24
25 *******************************************************************************/
26
27 #include "l1sw.cfg"
28
29 #include "chipset.cfg"
30 #include "board.cfg"
31 #include "rf.cfg"
32 #include "swconfig.cfg"
33
34 #if(OP_L1_STANDALONE == 0)
35 #include "debug.cfg"
36 #include "rv/rv_defined_swe.h"
37 #include "rtc/board/rtc_config.h"
38 #else
39 #include "l1_macro.h"
40 #include "l1_confg.h"
41 #endif
42
43 #if(OP_L1_STANDALONE == 0)
44 #include "swconfig.cfg"
45 #ifdef BLUETOOTH_INCLUDED
46 #include "btemobile.cfg"
47 #ifdef BT_CLK_REQ_INT
48 #include "board/bth_drv.h"
49 #endif
50 #endif
51 #endif
52
53
54 #if(L1_DYN_DSP_DWNLD == 1)
55 #include "l1_api_hisr.h"
56 #endif
57
58 #if (OP_L1_STANDALONE == 0)
59 #include "main/sys_types.h"
60 #else
61 #include "sys_types.h"
62 #endif
63
64 #if (CHIPSET == 12)
65 #include "sys_inth.h"
66 #else
67 #include "inth/inth.h"
68 #include "memif/mem.h"
69 #if (OP_L1_STANDALONE == 1)
70 #include "serialswitch_core.h"
71 #else
72 #include "uart/serialswitch.h"
73 #endif
74
75 #if (OP_L1_STANDALONE == 0)
76 #include "sim/sim.h"
77 #endif
78 #endif
79
80 #include "abb/abb_core_inth.h" // for External Interrupt
81 #define IQ_H
82 #include "inth/iq.h"
83 #include "ulpd/ulpd.h"
84 #if (BOARD == 34)
85 #include "csmi/csmi.h"
86 #endif
87
88 #if (defined RVM_DAR_SWE) && (defined _GSM)
89 extern void dar_watchdog_reset(void);
90 #endif
91
92 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45))
93 #include "armio/armio.h"
94 #if (OP_L1_STANDALONE == 0)
95 #include "uart/uartfax.h"
96 #endif
97 #endif
98
99 /* External declaration */
100 extern void GAUGING_Handler(void);
101 extern void TMT_Timer_Interrupt(void);
102 #if (OP_L1_STANDALONE == 1)
103 extern void TM_Timer1Handler(void);
104 #endif
105 extern void kpd_key_handler(void);
106 extern void TP_FrameIntHandler(void);
107
108 #if (OP_L1_STANDALONE == 0)
109 #if (defined RVM_MPM_SWE)
110 extern void MPM_InterruptHandler(void);
111 #endif
112
113 #if (TI_PROFILER == 1)
114 extern void ti_profiler_tdma_action(void);
115 #endif
116
117 #if(RF_FAM==35)
118 extern void TSP_RxHandler(void);
119 #endif
120
121 extern void RTC_GaugingHandler(void);
122 extern void RTC_ItTimerHandle(void);
123 extern void RTC_ItAlarmHandle(void);
124 #endif
125
126
127
128 /* Global variables */
129 unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */
130 unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */
131 unsigned IQ_TimerCount; /* Used to check if timer is incrementing */
132 unsigned IQ_DummyCount; /* Used to check if dummy IT */
133 unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/
134 unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */
135
136
137 #if (CHIPSET != 12)
138 /*--------------------------------------------------------------*/
139 /* irqHandlers */
140 /*--------------------------------------------------------------*/
141 /* Parameters :none */
142 /* Return : none */
143 /* Functionality : Table of interrupt handlers */
144 /* These MUST be 32-bit entries */
145 /*--------------------------------------------------------------*/
146
147 SYS_FUNC irqHandlers[IQ_NUM_INT] =
148 {
149 IQ_TimerHandler, /* Watchdog timer */
150 IQ_TimerHandler1, /* timer 1 */
151 IQ_TimerHandler2, /* timer 2 */
152 IQ_Dummy, /* AIRQ 3 */
153 IQ_FrameHandler, /* TPU Frame It AIRQ 4 */
154 IQ_Dummy, /* AIRQ 5 */
155 #if (OP_L1_STANDALONE == 0)
156 SIM_IntHandler, /* AIRQ 6 */
157 #else
158 IQ_Dummy, /* AIRQ 6 */
159 #endif
160 #if ((CHIPSET == 2) || (CHIPSET == 3))
161 SER_uart_handler, /* AIRQ 7 */
162 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
163 SER_uart_modem_handler, /* AIRQ 7 */
164 #endif
165 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
166 // CC test 0316
167 IQ_KeypadGPIOHandler, /* AIRQ 8 */
168 // end
169 #else
170 IQ_KeypadHandler, /* AIRQ 8 */
171 #endif
172 IQ_Rtc_Handler, /* AIRQ 9 RTC Timer*/
173 #if ((CHIPSET == 2) || (CHIPSET == 3))
174 IQ_RtcA_GsmTim_Handler, /* AIRQ 10 RTC ALARM OR ULPD GSM TIMER*/
175 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
176 IQ_RtcA_Handler, /* AIRQ 10 RTC ALARM */
177 #endif
178 IQ_Gauging_Handler, /* AIRQ 11 ULPD GAUGING */
179 IQ_External, /* AIRQ 12 */
180 IQ_Dummy, /* AIRQ 13 */
181 IQ_Dummy, /* DMA interrupt */
182 #if (CHIPSET == 4)
183 IQ_Dummy, /* LEAD */
184 IQ_Dummy, /* SIM card-detect fast interrupt */
185 IQ_Dummy, /* External fast interrupt */
186 SER_uart_irda_handler, /* UART IrDA interrupt */
187 IQ_GsmTim_Handler /* ULPD GSM timer */
188 #elif ((CHIPSET == 5) || (CHIPSET == 6))
189 IQ_Dummy, /* LEAD */
190 IQ_Dummy, /* SIM card-detect fast interrupt */
191 IQ_Dummy, /* External fast interrupt */
192 SER_uart_irda_handler, /* UART IrDA interrupt */
193 IQ_GsmTim_Handler, /* ULPD GSM timer */
194 #if (BOARD == 34)
195 IQ_IcrHandler32,
196 #else
197 IQ_Dummy, /* Not mapped interrupt */
198 #endif
199 IQ_Dummy, /* Not mapped interrupt */
200 IQ_Dummy, /* Not mapped interrupt */
201 IQ_Dummy, /* Not mapped interrupt */
202 IQ_Dummy /* GEA interrupt */
203 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
204 #if (L1_DYN_DSP_DWNLD == 1)
205 IQ_ApiHandler, /* LEAD */
206 #else
207 IQ_Dummy, /* LEAD */
208 #endif
209 IQ_Dummy, /* SIM card-detect fast interrupt */
210 IQ_Dummy, /* External fast interrupt */
211 SER_uart_irda_handler, /* UART IrDA interrupt */
212 IQ_GsmTim_Handler, /* ULPD GSM timer */
213 IQ_Dummy /* GEA interrupt */
214 #elif (CHIPSET == 9)
215 IQ_Dummy, /* LEAD */
216 IQ_Dummy, /* SIM card-detect fast interrupt */
217 IQ_Dummy, /* External fast interrupt */
218 SER_uart_irda_handler, /* UART IrDA interrupt */
219 IQ_GsmTim_Handler, /* ULPD GSM timer */
220 IQ_Dummy, /* Not mapped interrupt */
221 IQ_Dummy, /* Not mapped interrupt */
222 IQ_Dummy, /* Not mapped interrupt */
223 IQ_Dummy, /* Not mapped interrupt */
224 IQ_Dummy /* Reserved */
225 #else
226 IQ_Dummy /* LEAD */
227 #endif
228 };
229
230 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
231 /*--------------------------------------------------------------*/
232 /* fiqHandlers */
233 /*--------------------------------------------------------------*/
234 /* Parameters :none */
235 /* Return :none */
236 /* Functionality : Table of interrupt handlers */
237 /* These MUST be 32-bit entries */
238 /*--------------------------------------------------------------*/
239
240 SYS_FUNC fiqHandlers[IQ_NUM_INT] =
241 {
242 IQ_Dummy, /* Watchdog timer */
243 IQ_Dummy, /* timer 1 */
244 IQ_Dummy, /* timer 2 */
245 #if ((OP_L1_STANDALONE == 0) && (RF_FAM == 35))
246 TSP_RxHandler, /* 3 TSP */
247 #else
248 IQ_Dummy, /* AIRQ 3 */
249 #endif
250 IQ_Dummy, /* TPU Frame It AIRQ 4 */
251 IQ_Dummy, /* AIRQ 5 */
252 IQ_Dummy, /* AIRQ 6 */
253 IQ_Dummy, /* AIRQ 7 */
254 IQ_Dummy, /* AIRQ 8 */
255 IQ_Dummy, /* AIRQ 9 RTC Timer */
256 IQ_Dummy, /* AIRQ 10 RTC ALARM */
257 IQ_Dummy, /* AIRQ 11 ULPD GAUGING */
258 IQ_Dummy, /* AIRQ 12 */
259 IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */
260 IQ_Dummy, /* DMA interrupt */
261 IQ_Dummy, /* LEAD */
262 #if (OP_L1_STANDALONE == 0)
263 SIM_CD_IntHandler, /* SIM card-detect fast interrupt */
264 #else
265 IQ_Dummy, /* SIM card-detect fast interrupt */
266 #endif
267 IQ_Dummy, /* External fast interrupt */
268 IQ_Dummy, /* UART_IRDA interrupt */
269 #if (CHIPSET == 4)
270 IQ_Dummy /* ULPD GSM timer */
271 #elif ((CHIPSET == 5) || (CHIPSET == 6))
272 IQ_Dummy, /* ULPD GSM timer */
273 IQ_Dummy, /* Not mapped interrupt */
274 IQ_Dummy, /* Not mapped interrupt */
275 IQ_Dummy, /* Not mapped interrupt */
276 IQ_Dummy, /* Not mapped interrupt */
277 IQ_Dummy /* GEA interrupt */
278 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
279 IQ_Dummy, /* ULPD GSM timer */
280 IQ_Dummy /* GEA timer */
281 #elif (CHIPSET == 9)
282 IQ_Dummy, /* ULPD GSM timer */
283 IQ_Dummy, /* Not mapped interrupt */
284 IQ_Dummy, /* Not mapped interrupt */
285 IQ_Dummy, /* Not mapped interrupt */
286 IQ_Dummy, /* Not mapped interrupt */
287 IQ_Dummy /* Reserved */
288 #endif
289 };
290 #endif
291 #endif /* (CHIPSET != 12)*/
292
293 /*--------------------------------------------------------------*/
294 /* IQ_Gauging_Handler */
295 /*--------------------------------------------------------------*/
296 /* Parameters :none */
297 /* Return : none */
298 /* Functionality : Handle unused interrupts */
299 /*--------------------------------------------------------------*/
300 void IQ_Gauging_Handler(void)
301 {
302 GAUGING_Handler();
303 #if (OP_L1_STANDALONE == 0)
304 RTC_GaugingHandler();
305 #endif
306 }
307
308
309 /*--------------------------------------------------------------*/
310 /* IQ_External */
311 /*--------------------------------------------------------------*/
312 /* Parameters : none */
313 /* Return : none */
314 /* Functionality : Handle External IRQ mapped on ABB. */
315 /*--------------------------------------------------------------*/
316 void IQ_External(void)
317 {
318 #if (CHIPSET == 12)
319 // Mask external interrupt 12
320 F_INTH_DISABLE_ONE_IT(C_INTH_ABB_IRQ_IT);
321 #else
322 // Mask external interrupt 12
323 IQ_Mask(IQ_EXT);
324 #endif
325
326 // The external IRQ is mapped on the ABB interrupt.
327 // The associated HISR ABB_Hisr is activated on reception on the external IRQ.
328 if(Activate_ABB_HISR())
329 {
330 #if (CHIPSET == 12)
331 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT);
332 #else
333 // Mask external interrupt 12
334 IQ_Unmask(IQ_EXT);
335 #endif
336 }
337 }
338
339 #if (CHIPSET != 12)
340 /*--------------------------------------------------------------*/
341 /* IQ_Dummy */
342 /*--------------------------------------------------------------*/
343 /* Parameters :none */
344 /* Return : none */
345 /* Functionality : Handle unused interrupts */
346 /*--------------------------------------------------------------*/
347 void IQ_Dummy(void)
348 {
349 IQ_DummyCount++;
350 }
351 #endif
352
353 /*--------------------------------------------------------------*/
354 /* IQ_RTCHandler */
355 /*--------------------------------------------------------------*/
356 /* Parameters :none */
357 /* Return : none */
358 /* Functionality : Handle RTC Time interrupts */
359 /*--------------------------------------------------------------*/
360
361 void IQ_Rtc_Handler(void)
362 {
363 #if (OP_L1_STANDALONE == 0)
364 RTC_ItTimerHandle();
365 #endif
366 }
367
368 /*--------------------------------------------------------------*/
369 /* IQ_RtcA_GsmTim_Handler */
370 /*--------------------------------------------------------------*/
371 /* Parameters :none */
372 /* Return : none */
373 /* Functionality : Handle RTC ALARM or GAUGING interrupts */
374 /*--------------------------------------------------------------*/
375
376 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
377 void IQ_RtcA_Handler(void)
378 {
379 #if (OP_L1_STANDALONE == 0)
380 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
381 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
382 RTC_ItAlarmHandle();
383 #endif
384 }
385
386 void IQ_GsmTim_Handler(void)
387 {
388
389 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
390 {
391 // it is GSM Timer it.....
392 IQ_GsmTimerCount++;
393 }
394 }
395 #else
396 void IQ_RtcA_GsmTim_Handler(void)
397 {
398 #if (OP_L1_STANDALONE == 0)
399 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
400 {
401 // it is GSM Timer it.....
402 IQ_GsmTimerCount++;
403 }
404 else
405 {
406 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
407 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
408 RTC_ItAlarmHandle();
409 }
410 #endif
411 }
412 #endif
413
414 #if (BOARD == 34)
415 /*
416 * IQ_IcrHandler32
417 *
418 */
419 void IQ_IcrHandler32(void)
420 {
421 CSMI_InterruptHandler();
422 }
423 #endif
424
425 /*--------------------------------------------------------------*/
426 /* IQ_TimerHandler */
427 /*--------------------------------------------------------------*/
428 /* Parameters :none */
429 /* Return : none */
430 /* Functionality : Handle Timer interrupts */
431 /*--------------------------------------------------------------*/
432 void IQ_TimerHandler(void)
433 {
434 IQ_TimerCount++;
435 TMT_Timer_Interrupt();
436 #if (defined RVM_DAR_SWE) && (defined _GSM)
437 dar_watchdog_reset();
438 #endif
439 }
440
441 /*--------------------------------------------------------------*/
442 /* IQ_FramerHandler */
443 /*--------------------------------------------------------------*/
444 /* Parameters :none */
445 /* Return : none */
446 /* Functionality : Handle Timer interrupts */
447 /*--------------------------------------------------------------*/
448 void IQ_FrameHandler(void)
449 {
450 IQ_FrameCount++;
451 TMT_Timer_Interrupt();
452 TP_FrameIntHandler();
453 #if (OP_L1_STANDALONE == 0)
454 #if (TI_PROFILER == 1)
455 // TDMA treatment for profiling buffer
456 ti_profiler_tdma_action();
457 #endif
458 #endif
459 }
460
461 /*--------------------------------------------------------------*/
462 /* IQ_TimerHandler1 */
463 /*--------------------------------------------------------------*/
464 /* Parameters :none */
465 /* Return : none */
466 /* Functionality : Handle Timer 1 interrupts */
467 /*--------------------------------------------------------------*/
468 void IQ_TimerHandler1(void)
469 {
470 IQ_TimerCount1++;
471 #if (OP_L1_STANDALONE == 1)
472 TM_Timer1Handler();
473 #endif
474 }
475
476 /*--------------------------------------------------------------*/
477 /* IQ_TimerHandler2 */
478 /*--------------------------------------------------------------*/
479 /* Parameters :none */
480 /* Return : none */
481 /* Functionality : Handle Timer 2 interrupts */
482 /*--------------------------------------------------------------*/
483 void IQ_TimerHandler2(void)
484 {
485 IQ_TimerCount2++;
486 }
487 #if(L1_DYN_DSP_DWNLD == 1)
488
489 /*-------------------------------------------------------*/
490 /* IQ_ApiHandler() */
491 /*-------------------------------------------------------*/
492 /* Parameters : none */
493 /* Return : none */
494 /* Functionality : API int management */
495 /*-------------------------------------------------------*/
496 void IQ_ApiHandler(void)
497 {
498 l1_api_handler();
499 } /* IQ_ApiHandler() */
500 #endif
501
502
503 #if (CHIPSET !=12)
504 /*--------------------------------------------------------------*/
505 /* IQ_IRQ_isr */
506 /*--------------------------------------------------------------*/
507 /* Parameters :none */
508 /* Return : none */
509 /* Functionality : HHandle IRQ interrupts */
510 /*--------------------------------------------------------------*/
511 void IQ_IRQ_isr(void)
512 {
513 irqHandlers[((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
514 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_IRQ); /* valid next IRQ */
515 }
516
517 /*--------------------------------------------------------------*/
518 /* IQ_FIQ_isr */
519 /*--------------------------------------------------------------*/
520 /* Parameters :none */
521 /* Return : none */
522 /* Functionality : Handle FIQ interrupts */
523 /*--------------------------------------------------------------*/
524 void IQ_FIQ_isr(void)
525 {
526 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
527 fiqHandlers[((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
528 #endif
529 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */
530 }
531 #endif /* chipset != 12 ) */
532
533 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
534
535 /*--------------------------------------------------------------*/
536 /* IQ_KeypadGPIOHandler */
537 /*--------------------------------------------------------------*/
538 /* Parameters : none */
539 /* Return : none */
540 /* Functionality : Handle keypad and GPIO interrupts */
541 /*--------------------------------------------------------------*/
542 // CC test 0316
543 //#include "rvm/rvm_use_id_list.h"
544 //#include "rvf/rvf_api.h"
545 //static char debug_buffer[50];
546 // end
547
548 void IQ_KeypadGPIOHandler(void)
549 {
550
551 #if (OP_L1_STANDALONE == 0)
552 /*
553 * GPIO interrupt must be checked before the keypad interrupt. The GPIO
554 * status bit is reset when the register is read.
555 */
556
557 if (AI_CheckITSource (ARMIO_GPIO_INT))
558
559 // CC test 0315
560 {
561 AI_MaskIT (ARMIO_MASKIT_GPIO);
562 //sprintf(debug_buffer, "GPIO_Interrupt");
563 //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID);
564 AI_UnmaskIT(ARMIO_MASKIT_GPIO); //0x0002
565 // end
566 /*
567 #ifdef RVM_MPM_SWE
568 // check if the SWE has been started
569 MPM_InterruptHandler ();
570 #elif BT_CLK_REQ_INT
571
572 BT_DRV_ClkReqInterruptHandler( );
573 #else
574 UAF_DTRInterruptHandler ();
575 #endif
576 */
577 }
578 if (AI_CheckITSource (ARMIO_KEYPDAD_INT))
579 {
580 // CC test 0316
581 //sprintf(debug_buffer, "Key_Interrupt");
582 //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID);
583 // end
584 kpd_key_handler ();
585 }
586
587 #endif
588 }
589
590 #elif ((BOARD == 34) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45))
591
592 /*--------------------------------------------------------------*/
593 /* IQ_KeypadHandler */
594 /*--------------------------------------------------------------*/
595 /* Parameters :none */
596 /* Return : none */
597 /* Functionality : Handle keypad interrupts */
598 /*--------------------------------------------------------------*/
599 void IQ_KeypadHandler(void)
600 {
601 #if (OP_L1_STANDALONE == 0)
602 #if (BOARD == 34)
603 IQ_Mask (IQ_ARMIO);
604 #else
605 kpd_key_handler ();
606 #endif
607 #endif
608 }
609
610 #endif