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comparison src/cs/drivers/drv_core/armio/armio.h @ 0:b6a5e36de839

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src/cs: initial import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Jul 2018 04:39:26 +0000
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-1:000000000000 0:b6a5e36de839
1 /*
2 * ARMIO.H * * Control diagnostic bits * * Reference : GCS207 *
3 */
4
5 #include "chipset.cfg"
6
7 #include "l1sw.cfg"
8
9 #if (OP_L1_STANDALONE == 0)
10 #include "main/sys_types.h"
11 #else
12 #include "sys_types.h"
13 #endif
14
15
16 // Duplicate address with ARMIO_IO_CNTL
17 // Need to investigate !!!
18 //#define ARMIO_CNTL (MEM_ARMIO + 0x04) /* I/O control */
19
20 #define ARMIO_IN (MEM_ARMIO + 0x00) /* inputs */
21 #define ARMIO_OUT (MEM_ARMIO + 0x02) /* outputs */
22 #define ARMIO_IO_CNTL (MEM_ARMIO + 0x04) /* I/O control */
23 #define ARMIO_CNTL_REG (MEM_ARMIO + 0x06) /* control ARMIO */
24 #define ARMIO_LOAD_TIM (MEM_ARMIO + 0x08) /* load TIM */
25 #if (CHIPSET != 12)
26 #define ARMIO_KBR_IN (MEM_ARMIO + 0x0A) /* KBR inputs (rows) */
27 #define ARMIO_KBR_OUT (MEM_ARMIO + 0x0C) /* KBR outputs (columns) */
28 #endif
29 #define ARMIO_PWM_CNTL (MEM_ARMIO + 0x0E) /* LIGHT/BUZZER control */
30 #define ARMIO_LIGHT (MEM_ARMIO + 0x10) /* light value */
31 #define ARMIO_BUZZER (MEM_ARMIO + 0x12) /* buzzer value */
32 #define ARMIO_CLOCKEN 0x0020
33 #if (CHIPSET != 12)
34 #define CLKM_IO_CNTL MEM_IO_SEL /* control IO */
35 #endif
36
37 #if (CHIPSET == 12)
38 #define GPIO_INTERRUPT_LEVEL_REG * (volatile SYS_UWORD16 *) (MEM_ARMIO + 0x16)
39 #define GPIO_INTERRUPT_MASK_REG * (volatile SYS_UWORD16 *) (MEM_ARMIO + 0x18)
40 #else
41 #define ARMIO_GPIO_EVENT_MODE (MEM_ARMIO + 0x14) /* GPIO event mode */
42 #define ARMIO_KBD_GPIO_INT (MEM_ARMIO + 0x16) /* Kbd/GPIO IRQ register */
43 #define ARMIO_KBD_GPIO_MASKIT (MEM_ARMIO + 0x18) /* Kbd/GPIO mask IRQ */
44 // CC test 0316
45 #define ARMIO_GPIO_DEBOUNCE (MEM_ARMIO + 0x1A) /* GPIO debounceing register*/
46 // end
47 #endif
48
49
50 #if (CHIPSET != 12)
51 #define ARMIO_DCD (2) /* IO used for DCD on C-Sample - Output */
52 #endif
53 #define ARMIO_DTR (3) /* IO used for DTR on C-Sample - Input */
54
55 #define ARMIO_FALLING_EDGE (0)
56 #define ARMIO_RISING_EDGE (1)
57
58 #if (CHIPSET != 12)
59 #define ARMIO_KEYPDAD_INT (0x0001)
60 #define ARMIO_GPIO_INT (0x0002)
61
62 #define ARMIO_MASKIT_KBD (0x0001)
63 #define ARMIO_MASKIT_GPIO (0x0002)
64
65 void AI_EnableBit(int bit);
66 void AI_DisableBit(int bit);
67 #endif
68 void AI_SetBit(int bit);
69 void AI_ResetBit(int bit);
70 void AI_ConfigBitAsOutput(int bit);
71 void AI_ConfigBitAsInput(int bit);
72 SYS_BOOL AI_ReadBit(int bit);
73 void AI_SetSimIO3V(SYS_UWORD8 StdOutput);
74
75 #if (OP_L1_STANDALONE == 0)
76 void AI_Power(SYS_UWORD8 power);
77 #endif
78
79 void AI_ResetTspIO(void);
80 void AI_ResetDbgReg(void);
81 void AI_ResetIoConfig(void);
82 void AI_InitIOConfig(void);
83 void AI_ClockEnable (void);
84
85 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge);
86 #if (CHIPSET != 12)
87 int AI_CheckITSource (SYS_UWORD16 Source);
88 #endif
89 void AI_UnmaskIT (SYS_UWORD16 Source);
90 void AI_MaskIT (SYS_UWORD16 Source);
91