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comparison src/cs/system/main/gcc/exceptions.S @ 83:92fde62400ef

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.../gcc/exceptions.S: added 2nd part that was missing in Citrine
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 20 Jul 2018 18:21:46 +0000
parents 95ef11e76c5b
children
comparison
equal deleted inserted replaced
82:6afaa5cb7392 83:92fde62400ef
1 /* 1 /*
2 * This module contains ARM exception handlers which used to be 2 * This module contains ARM exception handlers which used to be
3 * in chipsetsw/system/Main/int.s in TI's Leonardo code. 3 * in chipsetsw/system/Main/int.s in TI's original version.
4 */ 4 */
5
6 .section "except_stack","aw",%nobits
7 .balign 4
8 .space 512
9 .globl _Except_Stack_SP
10 _Except_Stack_SP:
11 5
12 .text 6 .text
13 .code 32 7 .code 32
14 8
15 @ layout of xdump buffer: 9 @ layout of xdump buffer:
82 orr r10,r10,#0xAD<<16 76 orr r10,r10,#0xAD<<16
83 str r10,[r12,#4*17] @ save magic + index 77 str r10,[r12,#4*17] @ save magic + index
84 78
85 mov r0,r11 @ put index into 1st argument 79 mov r0,r11 @ put index into 1st argument
86 b dar_exception 80 b dar_exception
81
82 @ the second part
83
84 /*
85 * For the SP-in-RAM validity check, we use the following simplification:
86 * it doesn't really matter what the actual IRAM and XRAM sizes are on
87 * any given target, as the address decoder hooked up to the ARM7TDMI core
88 * always decodes the full 8 MiB address range for each, causing the
89 * actual memories to be aliased multiple times in those two ranges.
90 * Furthermore, the XRAM address range falls right after the IRAM one,
91 * thus we can get away with only a single range check.
92 */
93
94 #define RAM_LOW 0x00800000
95 #define RAM_HIGH 0x01800000
96
97 #define XDUMP_STACK_SIZE 20
98
99 .globl exception
100 exception:
101 ldr r12,=xdump_buffer
102 ldr r11,[r12,#4*13] @ get svc mode r13
103 add r12,r12,#4*18 @ base of stack buffer
104
105 @ check if svc r13(sp) is within internal/external RAM.
106 @ It *could* be invalid.
107 cmp r11,#RAM_LOW
108 blt nostack
109 mov r0,#RAM_HIGH
110 sub r0,r0,#XDUMP_STACK_SIZE
111 cmp r11,r0
112 bge nostack
113
114 stack_range:
115 ldmfd r11!,{r0-r9} @ copy ten stack words..
116 stmia r12!,{r0-r9}
117 ldmfd r11!,{r0-r9} @ copy ten stack words..
118 stmia r12!,{r0-r9}
119
120 nostack:
121 @ we're finished saving all state.
122 @ Now execute C code for more flexibility.
123 @ set up a stack for this C call
124 ldr sp,=_Stack_segment_end
125 b dar_reset