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l1_init.c: sync with Tourmaline: L1 recovery ABB init fix
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 31 Oct 2022 01:23:14 +0000
parents 1155be085fc1
children
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727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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1 # gcc-only component: libsys (selective libc replacement) for flash
727aad1c308f components/libsys_{fl,ir}: created
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2
95
a23e6e011264 closer to passing link with abort, exit and __assert_func stubbed out
Mychaela Falconia <falcon@freecalypso.org>
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3 ASMFLAGS=-mthumb-interwork
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1155be085fc1 components/*: added -g to CFLAGS_gcc
Mychaela Falconia <falcon@freecalypso.org>
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4 CFLAGS_gcc="-g -O2 -fno-builtin -mthumb-interwork -mthumb"
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727aad1c308f components/libsys_{fl,ir}: created
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5 CPPFLAGS=
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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6
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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7 SRCDIR=$SRC/libsys
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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8
727aad1c308f components/libsys_{fl,ir}: created
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9 c_file $SRCDIR/rand.c
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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10 c_file $SRCDIR/strtok.c
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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11 c_file $SRCDIR/sprintf/float.c
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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12 c_file $SRCDIR/sprintf/integer.c
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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13 c_file $SRCDIR/sprintf/sprintf.c
727aad1c308f components/libsys_{fl,ir}: created
Mychaela Falconia <falcon@freecalypso.org>
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14 c_file $SRCDIR/sprintf/vspcore.c
95
a23e6e011264 closer to passing link with abort, exit and __assert_func stubbed out
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parents: 87
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a23e6e011264 closer to passing link with abort, exit and __assert_func stubbed out
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parents: 87
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16 asm_file $SRCDIR/exitstub.S