fc-selenite: src/cs/system/main/init.c annotate

annotate src/cs/system/main/init.c @ 112:fdecfb3bd860

.../drv_app/r2d/r2d_*.c: LCD include case fixes from Magnetite R2D is not used in Selenite, but we strive to keep the two source trees in sync as much as possible to reduce the diffs.

author	Mychaela Falconia <falcon@freecalypso.org>
date	Sat, 13 Oct 2018 16:56:22 +0000
parents	1eb391057168
children	7409b22cac61

rev	line source
0 b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	1 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	2 * INIT.C
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	3 *
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	4 * This module allows to initialize the board:
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	5 * - wait states,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	6 * - unmask selected interrupts,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	7 * - initialize clock,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	8 * - disable watchdog.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	9 * Dummy functions used by the EVA3 library are defined.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	10 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	11
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	12 /* Config Files */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	13
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	14 #ifndef _WINDOWS
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	15 #include "l1sw.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	16 #include "rf.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	17 #include "chipset.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	18 #include "board.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	19 #include "swconfig.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	20 #include "fc-target.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	21 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	22 #include "rv.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	23 #include "sys.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	24 #include "debug.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	25 #ifdef BLUETOOTH_INCLUDED
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	26 #include "btemobile.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	27 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	28 #ifdef BLUETOOTH
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	29 #include "bluetooth.cfg"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	30 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	31 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	32
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	33 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	34 #include "rv/rv_defined_swe.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	35 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	36 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	37
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	38 /* Include Files */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	39 #include <assert.h>
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	40 #include <ctype.h>
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	41 #include <stdarg.h>
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	42 #include <stdlib.h>
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	43 #include <string.h>
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	44
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	45 #include "nucleus.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	46
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	47 #include "sys_types.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	48 #include "l1_types.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	49 #include "l1_confg.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	50 #include "l1_const.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	51
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	52 #if TESTMODE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	53 #include "l1tm_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	54 #endif // TESTMODE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	55
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	56 #if (AUDIO_TASK == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	57 #include "l1audio_const.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	58 #include "l1audio_cust.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	59 #include "l1audio_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	60 #endif // AUDIO_TASK
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	61
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	62 #if (L1_GTT == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	63 #include "l1gtt_const.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	64 #include "l1gtt_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	65 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	66
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	67 #if (L1_MP3 == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	68 #include "l1mp3_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	69 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	70
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	71 #if (L1_MIDI == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	72 #include "l1midi_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	73 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	74
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	75 #if (L1_AAC == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	76 #include "l1aac_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	77 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	78 #if (L1_DYN_DSP_DWNLD == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	79 #include "l1_dyn_dwl_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	80 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	81
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	82 #if (TRACE_TYPE == 4)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	83 #include "l1_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	84 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	85
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	86
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	87 #if ((OP_L1_STANDALONE == 1) && (CODE_VERSION != SIMULATION) && (PSP_STANDALONE == 0))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	88
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	89 #if (AUDIO_TASK == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	90 #include "l1audio_signa.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	91 #include "l1audio_msgty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	92 #endif // AUDIO_TASK
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	93
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	94 #if (L1_GTT == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	95 #include "l1gtt_signa.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	96 #include "l1gtt_msgty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	97 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	98
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	99 #include "l1_defty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	100 #include "cust_os.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	101 #include "l1_msgty.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	102 #include "nu_main.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	103 #include "l1_varex.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	104 #include "l1_proto.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	105 #include "hw_debug.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	106 #include "l1_trace.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	107
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	108 #endif /* ((OP_L1_STANDALONE == 1) && (CODE_VERSION != SIMULATION) && (PSP_STANDALONE==0)) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	109
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	110
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	111 #include "armio/armio.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	112 #include "timer/timer.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	113
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	114 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	115 #include "rvf/rvf_api.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	116 #include "rvm/rvm_api.h" /* A-M-E-N-D-E-D! */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	117 #include "sim/sim.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	118 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	119
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	120 #include "abb/abb.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	121
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	122 #include "inth/iq.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	123 #include "tpudrv.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	124 #include "memif/mem.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	125 #include "clkm/clkm.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	126 #include "inth/inth.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	127
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	128 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	129 #include "uart/serialswitch_core.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	130 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	131 #include "uart/serialswitch.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	132 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	133 #include "uart/traceswitch.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	134
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	135
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	136 #include "dma/dma.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	137 #include "rhea/rhea_arm.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	138
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	139 #include "ulpd/ulpd.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	140
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	141 #if (PSP_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	142 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	143 extern void ffs_main_init(void);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	144 extern void create_tasks(void);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	145 #if TI_NUC_MONITOR == 1
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	146 extern void ti_nuc_monitor_tdma_action( void );
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	147 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	148
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	149 #if WCP_PROF == 1
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	150 #if PRF_CALIBRATION == 1
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	151 extern NU_HISR prf_CalibrationHISR;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	152 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	153 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	154
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	155 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	156 void l1ctl_pgm_clk32(UWORD32 nb_hf, UWORD32 nb_32khz);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	157 extern void L1_trace_string(char *s);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	158 #endif /* (OP_L1_STANDALONE) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	159 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	160
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	161 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	162 #if ((TRACE_TYPE==1) \|\| (TRACE_TYPE==2) \|\| (TRACE_TYPE==3) \|\| (TRACE_TYPE==7) \|\| TESTMODE)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	163 #include "uart/uart.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	164 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	165 * Serial Configuration set up.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	166 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	167
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	168 extern char ser_cfg_info[NUMBER_OF_TR_UART];
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	169 #include "rvt_gen.h"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	170 extern T_RVT_USER_ID trace_id;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	171 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	172 #endif /* (OP_L1_STANDALONE == 1) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	173
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	174 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	175 * Serial Configuration set up.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	176 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	177
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	178 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	179 ** One config is:
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	180 ** {XXX_BT_HCI, // Bluetooth HCI
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	181 ** XXX_FAX_DATA, // Fax/Data AT-Cmd
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	182 ** XXX_TRACE, // L1/Riviera Trace Mux
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	183 ** XXX_TRACE}, // Trace PS
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	184 **
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	185 ** with XXX being DUMMY, UART_IRDA or UART_MODEM
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	186 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	187
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	188 #if ((((TRACE_TYPE==1) \|\| (TRACE_TYPE==2) \|\| (TRACE_TYPE==3) \|\| (TRACE_TYPE==7) \|\|\
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	189 (TESTMODE)) && (OP_L1_STANDALONE == 1)) \|\| (OP_L1_STANDALONE == 0))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	190 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	191 static T_AppliSerialInfo appli_ser_cfg_info =
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	192 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	193 T_AppliSerialInfo appli_ser_cfg_info =
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	194 #endif /* OP_L1_STANDALONE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	195 {
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	196 #ifdef CONFIG_RVTMUX_ON_MODEM
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	197 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	198 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	199 UART_MODEM_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	200 DUMMY_TRACE}, // 0x0248
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	201 #else // RVTMUX_ON_MODEM
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	202 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	203 UART_MODEM_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	204 UART_IRDA_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	205 DUMMY_TRACE}, // default config = 0x0168
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	206 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	207 #ifdef BTEMOBILE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	208 12, // 12 serial config allowed
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	209 #else // BTEMOBILE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	210 9, // 9 serial config allowed
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	211 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	212 {
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	213 // Configs with Condat Panel only
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	214 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	215 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	216 DUMMY_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	217 UART_IRDA_TRACE}, // 0x1048
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	218 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	219 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	220 DUMMY_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	221 UART_MODEM_TRACE}, // 0x2048
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	222 // Configs with L1/Riviera Trace only
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	223 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	224 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	225 UART_IRDA_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	226 DUMMY_TRACE}, // 0x0148
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	227 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	228 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	229 UART_MODEM_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	230 DUMMY_TRACE}, // 0x0248
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	231 // Configs with AT-Cmd only
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	232 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	233 UART_MODEM_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	234 DUMMY_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	235 DUMMY_TRACE}, // 0x0068
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	236 // Configs with Condat Panel and L1/Riviera Trace
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	237 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	238 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	239 UART_MODEM_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	240 UART_IRDA_TRACE}, // 0x1248
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	241 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	242 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	243 UART_IRDA_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	244 UART_MODEM_TRACE}, // 0x2148
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	245 // Configs with Condat Panel and AT-Cmd
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	246 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	247 UART_MODEM_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	248 DUMMY_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	249 UART_IRDA_TRACE}, // 0x1068
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	250 #ifdef BTEMOBILE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	251 // Configs with L1/Riviera Trace and Bluetooth HCI
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	252 {UART_IRDA_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	253 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	254 UART_MODEM_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	255 DUMMY_TRACE}, // 0x0249
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	256 {UART_MODEM_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	257 DUMMY_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	258 UART_IRDA_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	259 DUMMY_TRACE}, // 0x014A
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	260 // Configs with AT-Cmd and Bluetooth HCI
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	261 {UART_IRDA_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	262 UART_MODEM_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	263 DUMMY_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	264 DUMMY_TRACE}, // 0x0069
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	265 #endif // BTEMOBILE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	266 // Configs with L1/Riviera Trace and AT-Cmd
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	267 {DUMMY_BT_HCI,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	268 UART_MODEM_FAX_DATA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	269 UART_IRDA_TRACE,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	270 DUMMY_TRACE} // 0x0168
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	271 }
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	272 };
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	273 #endif /* (TRACE_TYPE ...) \|\| (OP_L1_STANDALONE == 0) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	274
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	275
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	276 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	277 * Init_Target
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	278 *
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	279 * Performs low-level HW Initialization.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	280 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	281 void Init_Target(void)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	282 {
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	283 #if (BOARD == 5)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	284 #define WS_ROM (1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	285 #define WS_RAM (1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	286 #define WS_APIF (1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	287 #define WS_CS2 (7) /* LCD on EVA3. */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	288 #define WS_CS0 (7) /* DUART on EVA3. UART16750 and latch on A-Sample. */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	289 #define WS_CS1 (7) /* LCD on A-Sample. */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	290
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	291 IQ_InitWaitState (WS_ROM, WS_RAM, WS_APIF, WS_CS2, WS_CS0, WS_CS1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	292 IQ_InitClock (2); /* Internal clock division factor. */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	293
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	294 IQ_MaskAll (); /* Mask all interrupts. */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	295 IQ_SetupInterrupts (); /* IRQ priorities. */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	296
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	297 TM_DisableWatchdog ();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	298
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	299 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	300 * Reset all TSP and DBG fdefault values
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	301 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	302
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	303 AI_ResetTspIO ();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	304 AI_ResetDbgReg ();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	305 AI_ResetIoConfig ();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	306
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	307 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	308 * Warning! The external reset signal is connected to the Omega and the
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	309 * external device. If the layer 1 is used its initialization removes
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	310 * the external reset. If the application does not use the layer 1
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	311 * you must remove the external reset (bit 2 of the reset control
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	312 * register 0x505808).
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	313 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	314
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	315 AI_ResetTspIO();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	316 AI_ResetDbgReg();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	317 AI_ResetIoConfig();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	318
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	319 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	320 * Configure all IOs (see RD300 specification).
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	321 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	322
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	323 AI_ConfigBitAsInput (1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	324 AI_EnableBit (1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	325
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	326 AI_ConfigBitAsOutput (2);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	327 AI_EnableBit (2);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	328
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	329 AI_ConfigBitAsInput (11);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	330 AI_EnableBit (11);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	331
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	332 AI_ConfigBitAsOutput (13);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	333 AI_EnableBit (13);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	334
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	335 AI_Power (1); /* Maintain power supply. */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	336
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	337 #elif (BOARD == 6) \|\| (BOARD == 7) \|\| (BOARD == 8) \|\| (BOARD == 9) \|\| \
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	338 (BOARD == 40) \|\| (BOARD == 41) \|\| (BOARD == 42) \|\| (BOARD == 43) \|\| (BOARD == 45) \|\| \
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	339 (BOARD == 35) \|\| (BOARD == 46) \|\| (BOARD == 70) \|\| (BOARD == 71)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	340
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	341 #if (PSP_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	342 // RIF/SPI rising edge clock for ULYSSE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	343 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	344 #if ((ANLG_FAM == 1) \|\| (ANLG_FAM == 2) \|\| (ANLG_FAM == 3)\|\| (ANLG_FAM == 11))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	345 #if ((CHIPSET >= 3))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	346 #if (CHIPSET == 12)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	347 F_CONF_RIF_RX_RISING_EDGE;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	348 F_CONF_SPI_RX_RISING_EDGE;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	349 #elif (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	350 //do the DRP init here for Locosto
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	351 #if (L1_DRP == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	352 // drp_power_on(); This should be done after the script is downloaded.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	353 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	354 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	355 #if (BOARD==35)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	356 ((volatile SYS_UWORD16 ) ASIC_CONF) = 0x2000;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	357 #elif defined(CONFIG_TARGET_PIRELLI)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	358 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	359 * Pirelli's version of this Init_Target() function
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	360 * in their fw sets the ASIC_CONF register to 0x6050,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	361 * which means PWL on the LT/PWL pin and LPG on the
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	362 * DSR_MODEM pin.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	363 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	364 ((volatile SYS_UWORD16 ) ASIC_CONF) = 0x6050;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	365 #elif defined(CONFIG_TARGET_GTAMODEM)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	366 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	367 * The DSR_MODEM/LPG Calypso signal is unconnected on
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	368 * Openmoko's modem, so let's mux it as LPG (output)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	369 * so it doesn't float, like Foxconn seem to have done
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	370 * on the Pirelli.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	371 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	372 ((volatile SYS_UWORD16 ) ASIC_CONF) = 0x6040;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	373 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	374 ((volatile SYS_UWORD16 ) ASIC_CONF) = 0x6000;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	375 #endif /* (BOARD == 35) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	376 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	377 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	378 #endif /* ANLG(ANALOG)) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	379
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	380 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	381 #if (BOARD == 40) \|\| (BOARD == 41) \|\| \
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	382 (BOARD == 42) \|\| (BOARD == 43) \|\| (BOARD == 45)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	383 // enable 8 Ohm amplifier for audio on D-sample
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	384 AI_ConfigBitAsOutput (1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	385 AI_SetBit(1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	386 #elif (BOARD == 70) \|\| (BOARD == 71)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	387 //Locosto I-sample or UPP costo board.BOARD
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	388 // Initialize the ARMIO bits as per the I-sample spec
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	389 // FIXME
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	390 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	391 #endif /* (OP_L1_STANDALONE == 1) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	392 #endif /* PSP_STANDALONE ==0 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	393
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	394 // Watchdog
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	395 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	396 TM_DisableWatchdog(); /* Disable Watchdog */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	397 #if (CHIPSET == 12) \|\| (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	398 TM_SEC_DisableWatchdog();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	399 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	400
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	401 #if ((CHIPSET == 4) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12) \|\| (CHIPSET == 15))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	402
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	403 #if (CHIPSET == 12)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	404
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	405 #if 0 /* example of configuration for DMA debug */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	406 #if (BOARD == 6) /* debug on EVA 4 , GPO2 must not be changed */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	407
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	408 /* TPU_FRAME, NMIIT, IACKn */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	409 F_DBG_IRQ_CONFIG(C_DBG_IRQ_IRQ4\|C_DBG_IRQ_NMIIT\|C_DBG_IRQ_IACKN);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	410
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	411 /* NDMA_REQ_VIEW1, NDMA_REQ_VIEW0, DMA_V(1), DMA_S(1), DMAREQ_P1(3:0)*/
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	412 F_DBG_DMA_P1_NDFLASH_CONFIG(C_DBG_DMA_P1_NDFLASH_NDMA_REQ_VIEW_1 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	413 C_DBG_DMA_P1_NDFLASH_NDMA_REQ_VIEW_0 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	414 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_3 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	415 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_2 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	416 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_1 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	417 C_DBG_DMA_P1_NDFLASH_DMA_REQ_P1_0 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	418 C_DBG_DMA_P1_NDFLASH_DMA_REQ_S_1 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	419 C_DBG_DMA_P1_NDFLASH_DMA_REQ_V1 );
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	420 /* DMA_REQ_S(2)*/
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	421 F_DBG_DMA_P2_CONFIG(C_DBG_DMA_P2_DMA_REQ_S2);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	422
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	423 /* DMA_CLK_REQ, BRIDGE_CLK */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	424 F_DBG_CLK1_CONFIG(C_DBG_CLK1_DMA_CLK_REQ \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	425 C_DBG_CLK1_BRIDGE_CLK );
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	426
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	427 /* XIO_nREADY */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	428 F_DBG_IMIF_CONFIG(C_DBG_IMIF_XIO_NREADY_MEM);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	429
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	430 /* DSP_nIRQ_VIEW1, DSP_nIRQ_VIEW0, BRIDGE_EN */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	431 F_DBG_KB_USIM_SHD_CONFIG(C_DBG_KB_USIM_SHD_DSP_NIRQ_VIEW_1 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	432 C_DBG_KB_USIM_SHD_DSP_NIRQ_VIEW_0 \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	433 C_DBG_KB_USIM_SHD_BRIDGE_EN );
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	434
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	435 /* RHEA_nREADY , RHEA_nSTROBE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	436 F_DBG_USIM_CONFIG(C_DBG_USIM_RHEA_NSTROBE \|
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	437 C_DBG_USIM_RHEA_NREADY );
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	438
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	439 /* XIO_STROBE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	440 F_DBG_MISC2_CONFIG(C_DBG_MISC2_X_IOSTRBN);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	441
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	442 /* DMA_CLK_REQ */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	443 F_DBG_CLK2_CONFIG(C_DBG_CLK2_DMA_CLK_REQ2);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	444
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	445 /* DSP_IRQ_SEL0=DMA, DSP_IRQ_SEL1=DMA, DMA_REQ_SEL0=RIF_RX, DMA_REQ_SEL1=RIF_RX */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	446 F_DBG_VIEW_CONFIG(0,0,C_DBG_DSP_INT_DMA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	447 C_DBG_DSP_INT_DMA,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	448 C_DMA_CHANNEL_RIF_RX,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	449 C_DMA_CHANNEL_RIF_RX);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	450
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	451 #endif /* (BOARD == 6) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	452 #endif /* DMA debug example */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	453 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	454 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	455 * Configure ASIC in order to output the DPLL and ARM clock
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	456 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	457 // (( volatile UWORD16 )(0xFFFEF008)) = 0x8000; // DPLL
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	458 // (( volatile UWORD16 )(0xFFFEF00E)) = 0x0004; // ARM clock
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	459 // (( volatile UWORD16 )(0xfffef004)) = 0x0600; // DSP clock + nIACK
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	460 #endif /* (CHIPSET == 12) \|\| CHIPSET == 15*/
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	461
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	462
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	463 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	464 * Enable/Disable of clock switch off for INTH, TIMER, BRIDGE and DPLL modules
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	465 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	466 // IRQ, Timer and bridge may SLEEP
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	467 // In first step, same configuration as SAMSON
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	468 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	469 #if (CHIPSET == 12)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	470 CLKM_INITCNTL(CLKM_IRQ_DIS \| CLKM_TIMER_DIS \| CLKM_BRIDGE_DIS \| CLKM_DPLL_DIS);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	471 #elif (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	472 CLKM_INITCNTL(CLKM_IRQ_DIS \| CLKM_TIMER_DIS \| CLKM_CPORT_EN \| CLKM_BRIDGE_DIS \| 0x8000 ); /* CLKM_DPLL_DIS is remove by Ranga*/
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	473
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	474 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	475 CLKM_INITCNTL(CLKM_IRQ_DIS \| CLKM_TIMER_DIS);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	476
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	477 // Select VTCXO input frequency
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	478 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	479 CLKM_UNUSED_VTCXO_26MHZ;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	480
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	481 // Rita RF uses 26MHz VCXO
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	482 #if (RF_FAM == 12)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	483 CLKM_USE_VTCXO_26MHZ;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	484 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	485 // Renesas RF uses 26MHz on F-sample but 13MHz on TEB
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	486 #if (RF_FAM == 43) && (BOARD == 46)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	487 CLKM_USE_VTCXO_26MHZ;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	488 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	489 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	490
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	491
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	492 // Control HOM/SAM automatic switching
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	493 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	494 ((volatile unsigned short ) CLKM_CNTL_CLK) &= ~CLKM_EN_IDLE3_FLG;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	495
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	496 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	497 * The following part has been reconstructed from disassembly.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	498 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	499 RHEA_INITRHEA(0,0,0xFF);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	500 DPLL_INIT_BYPASS_MODE(DPLL_BYPASS_DIV_1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	501 #if (CHIPSET == 8)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	502 DPLL_INIT_DPLL_CLOCK(DPLL_LOCK_DIV_1, 6);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	503 #elif (CHIPSET == 10)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	504 DPLL_INIT_DPLL_CLOCK(DPLL_LOCK_DIV_1, 8);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	505 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	506 #error "We only have DPLL setup for CHIPSETs 8 and 10"
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	507 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	508 CLKM_InitARMClock(0x00, 2, 0); /* no low freq, no ext clock, div by 1 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	509 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	510 * FreeCalypso change: memory timings and widths
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	511 * are target-dependent.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	512 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	513 #ifdef CONFIG_TARGET_PIRELLI
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	514 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	515 * Pirelli's version of this Init_Target() function
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	516 * in their fw does the following:
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	517 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	518 MEM_INIT_CS0(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	519 MEM_INIT_CS1(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	520 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	521 MEM_INIT_CS3(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	522 MEM_INIT_CS4(7, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	523 #elif defined(CONFIG_TARGET_FCFAM)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	524 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	525 * The settings currently adopted for the FreeCalypso
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	526 * hardware family, only nCS0, nCS1 and nCS2 are used
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	527 * presently.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	528 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	529 MEM_INIT_CS0(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	530 MEM_INIT_CS1(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	531 MEM_INIT_CS2(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	532 MEM_INIT_CS3(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	533 MEM_INIT_CS4(4, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	534 #elif defined(CONFIG_TARGET_DSAMPLE) && (CHIPSET == 8)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	535 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	536 * On D-Sample C05 (older Calypso silicon version) the clocks
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	537 * run slower: the ARM clock runs at 39 MHz instead of 52 MHz.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	538 * Therefore, we need to use fewer wait states to effect
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	539 * the same memory speed.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	540 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	541 MEM_INIT_CS0(2, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	542 MEM_INIT_CS1(2, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	543 MEM_INIT_CS2(2, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	544 MEM_INIT_CS3(2, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	545 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	546 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	547 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	548 * The original settings from Openmoko,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	549 * only nCS0 and nCS1 are actually used,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	550 * same as on Mot C1xx phones,
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	551 * the nCS2/3/4 settings are dummies from TI.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	552 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	553 MEM_INIT_CS0(3, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	554 MEM_INIT_CS1(3, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	555 MEM_INIT_CS2(5, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	556 MEM_INIT_CS3(3, MEM_DVS_16, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	557 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	558 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	559 MEM_INIT_CS6(0, MEM_DVS_32, MEM_WRITE_EN, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	560 MEM_INIT_CS7(0, MEM_DVS_32, MEM_WRITE_DIS, 0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	561 RHEA_INITAPI(0,1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	562 RHEA_INITARM(0,0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	563 DPLL_SET_PLL_ENABLE;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	564
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	565 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	566 * Disable and Clear all pending interrupts
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	567 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	568 #if (CHIPSET == 12) \|\| (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	569 F_INTH_DISABLE_ALL_IT; // MASK all it
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	570 F_INTH2_VALID_NEXT(C_INTH_IRQ); // reset current IT in INTH2 IRQ
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	571 F_INTH_VALID_NEXT(C_INTH_IRQ); // reset current IT in INTH IRQ
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	572 F_INTH_VALID_NEXT(C_INTH_FIQ); // reset current IT in INTH FIQ
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	573 F_INTH_RESET_ALL_IT; // reset all IRQ/FIQ source
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	574 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	575 INTH_DISABLEALLIT;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	576 #if 0 /* not present in our reference binary object */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	577 INTH_RESETALLIT;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	578 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	579 INTH_CLEAR; /* reset IRQ/FIQ source */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	580 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	581
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	582 // INTH
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	583 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	584 #if (CHIPSET == 12) \|\| (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	585 #if (GSM_IDLE_RAM != 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	586 f_inth_setup((T_INTH_CONFIG *)a_inth_config_idle_ram); // setup configuration IT handlers
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	587 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	588 f_inth_setup((T_INTH_CONFIG *)a_inth_config); // setup configuration IT handlers
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	589 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	590 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	591 IQ_SetupInterrupts();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	592 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	593
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	594
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	595 #if (CHIPSET == 12) \|\| (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	596 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	597
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	598 f_dma_global_parameter_set((T_DMA_TYPE_GLOBAL_PARAMETER *)&d_dma_global_parameter);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	599 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	600 f_dma_channel_allocation_set(C_DMA_CHANNEL_0, C_DMA_CHANNEL_DSP);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	601 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	602 f_dma_global_parameter_set((T_DMA_TYPE_GLOBAL_PARAMETER *)&d_dma_global_parameter);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	603 f_dma_channel_allocation_set(C_DMA_CHANNEL_0, C_DMA_CHANNEL_DSP);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	604 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	605
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	606 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	607 // DMA
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	608 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	609 // channel0 = Arm, channel1 = Lead, channel2 = forced to Arm, channel3=forced to Arm, dma_burst = 0001, priority = same
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	610 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	611 DMA_ALLOCDMA(1,0,1,1); // Channel 1 used by DSP with RIF RX
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	612 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	613 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	614
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	615 /* CHIPSET = 4 or 7 or 8 or 10 or 11 or 12 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	616
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	617 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	618
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	619 // RHEA Bridge
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	620 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	621 // ACCES_FAC_0 = 0, ACCES_FAC_1 = 0 ,TIMEOUT = 0x7F
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	622 RHEA_INITRHEA(0,0,0x7F);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	623
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	624 #if (CHIPSET == 6)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	625 // WS_H = 1 , WS_L = 15
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	626 RHEA_INITAPI(1,15); // should be 0x01E1 for 65 Mhz
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	627 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	628 // WS_H = 0 , WS_L = 7
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	629 RHEA_INITAPI(0,7); // should be 0x0101 for 65 Mhz
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	630 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	631
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	632 // Write_en_0 = 0 , Write_en_1 = 0
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	633 RHEA_INITARM(0,0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	634
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	635 // INTH
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	636 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	637 INTH_DISABLEALLIT; // MASK all it
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	638 INTH_CLEAR; // reset IRQ/FIQ source
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	639 IQ_SetupInterrupts();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	640
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	641 // DMA
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	642 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	643 // channel0 = Arm, channel1 = Lead, dma_burst = 0001, priority = same
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	644 DMA_ALLOCDMA(1,0,1,1); // should be 0x25 (channel 1 = lead)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	645
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	646 #if (CHIPSET == 6)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	647 // Memory WS configuration for ULYSS/G1 (26 Mhz) board
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	648 //-----------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	649 MEM_INIT_CS2(2,MEM_DVS_16,MEM_WRITE_EN,0);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	650 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	651
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	652 // CLKM
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	653 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	654 CLKM_InitARMClock(0x00, 2); /* no low freq, no ext clock, div by 1 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	655
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	656 #if (CHIPSET == 6)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	657 CLKM_INITCNTL(CLKM_IRQ_DIS \| CLKM_BRIDGE_DIS \| CLKM_TIMER_DIS \| CLKM_VTCXO_26);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	658 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	659 CLKM_INITCNTL(CLKM_IRQ_DIS \| CLKM_BRIDGE_DIS \| CLKM_TIMER_DIS);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	660 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	661
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	662 #endif /* CHIPSET = 4 or 7 or 8 or 10 or 11 or 12 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	663
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	664 // Freeze ULPD timer ....
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	665 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	666 ((volatile SYS_UWORD16 ) ULDP_GSM_TIMER_INIT_REG ) = 0;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	667 ((volatile SYS_UWORD16 ) ULDP_GSM_TIMER_CTRL_REG ) = TPU_FREEZE;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	668
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	669 // reset INC_SIXTEEN and INC_FRAC
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	670 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	671 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	672 l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE,DEFAULT_32KHZ_VALUE);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	673 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	674 ULDP_INCSIXTEEN_UPDATE(132); //32768.29038 =>132, 32500 => 133
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	675 // 26000 --> 166
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	676 ULDP_INCFRAC_UPDATE(15840); //32768.29038 =>15840, 32500 => 21845
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	677 // 26000 --> 43691
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	678 #endif /* OP_L1_STANDALONE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	679
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	680 // program ULPD WAKE-UP ....
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	681 //=================================================
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	682 #if (CHIPSET == 2)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	683 ((volatile SYS_UWORD16 )ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 2 frame
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	684 ((volatile SYS_UWORD16 )ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 31 periods
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	685 ((volatile SYS_UWORD16 )ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	686 ((volatile SYS_UWORD16 )ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	687 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	688 ((volatile SYS_UWORD16 )ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 3 frames
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	689 ((volatile SYS_UWORD16 )ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 0 periods
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	690 ((volatile SYS_UWORD16 )ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	691 ((volatile SYS_UWORD16 )ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	692 ((volatile SYS_UWORD16 )ULPD_SETUP_RF_REG) = SETUP_RF; // 31 periods
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	693 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	694
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	695 // Set Gauging versus HF (PLL)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	696 //=================================================
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	697 ULDP_GAUGING_SET_HF; // Enable gauging versus HF
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	698 ULDP_GAUGING_HF_PLL; // Gauging versus PLL
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	699
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	700 // current supply for quartz oscillation
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	701 //=================================================
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	702 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	703 #if ((CHIPSET != 9) && (CHIPSET != 12) && (CHIPSET !=15)) // programming model changed for Ulysse C035, stay with default value
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	704 (volatile SYS_UWORD16 )QUARTZ_REG = 0x27;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	705 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	706 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	707 #if ((BOARD == 6) \|\| (BOARD == 8) \|\| (BOARD == 9) \|\| (BOARD == 35) \|\| (BOARD == 40) \|\| (BOARD == 41))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	708 ((volatile SYS_UWORD16 )QUARTZ_REG) = 0x27;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	709 #elif (BOARD == 7)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	710 ((volatile SYS_UWORD16 )QUARTZ_REG) = 0x24;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	711 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	712 #endif /* OP_L1_STANDALONE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	713
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	714 // stop Gauging if any (debug purpose ...)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	715 //--------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	716 if ( ((volatile SYS_UWORD16 ) ULDP_GAUGING_CTRL_REG) & ULDP_GAUGING_EN)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	717 {
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	718 volatile UWORD32 j;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	719 ULDP_GAUGING_STOP; /* Stop the gauging */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	720 /* wait for gauging it*/
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	721 // one 32khz period = 401 periods of 13Mhz
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	722 for (j=1; j<50; j++);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	723 while (! (* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_IT_GAUGING);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	724 }
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	725
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	726 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	727 AI_ClockEnable ();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	728
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	729 #if (BOARD == 7)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	730 // IOs configuration of the B-Sample in order to optimize the power consumption
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	731 AI_InitIOConfig();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	732
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	733 // Set LPG instead of DSR_MODEM
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	734 ((volatile SYS_UWORD16 ) ASIC_CONF) \|= 0x40;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	735 // Reset the PERM_ON bit of LCR_REG
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	736 ((volatile SYS_UWORD16 ) MEM_LPG) &= ~(0x80);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	737 #elif ((BOARD == 8) \|\| (BOARD == 9))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	738 // IOs configuration of the C-Sample in order to optimize the power consumption
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	739 AI_InitIOConfig();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	740
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	741 // set the debug latch to 0x00.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	742 ((volatile SYS_UWORD8 ) 0x2800000) = 0x00;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	743 #elif ((BOARD == 35) \|\| (BOARD == 46))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	744 AI_InitIOConfig();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	745 // CSMI INTERFACE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	746 // Initialize CSMI clients for GSM control
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	747 // and Fax/Data services
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	748 CSMI_Init();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	749 GC_Initialize(); // GSM control initialization
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	750 CU_Initialize(); // Trace initialization
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	751 CF_Initialize(); // Fax/Data pre-initialization
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	752 #elif ((BOARD == 40) \|\| (BOARD == 41))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	753 // IOs configuration of the D-Sample in order to optimize the power consumption
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	754 AI_InitIOConfig();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	755
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	756 #ifdef BTEMOBILE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	757 // Reset BT chip by toggling the Island's nRESET_OUT signal
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	758 ((volatile SYS_UWORD16 ) 0xFFFFFD04) \|= 0x04;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	759 ((volatile SYS_UWORD16 ) 0xFFFFFD04) &= ~(0x4);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	760 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	761
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	762 // set the debug latch to 0x0000.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	763 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	764 * FreeCalypso change: this write is only correct when running
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	765 * on an actual D-Sample board, but not on any of the real-world
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	766 * Calypso target devices.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	767 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	768 #ifdef CONFIG_TARGET_DSAMPLE
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	769 ((volatile SYS_UWORD16 ) 0x2700000) = 0x0000;
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	770 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	771 #endif // BOARD
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	772
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	773 // Enable HW Timers 1 & 2
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	774 TM_EnableTimer (1);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	775 TM_EnableTimer (2);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	776
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	777 #endif /* (OP_L1_STANDALONE == 0) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	778
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	779 #endif /* #if (BOARD == 5) */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	780 }
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	781
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	782 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	783 * Init_Drivers
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	784 *
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	785 * Performs Drivers Initialization.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	786 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	787 void Set_Switch_ON_Cause(void);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	788 void Init_Drivers(void)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	789 {
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	790
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	791 #if (CHIPSET==15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	792 bspI2c_init();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	793 bspTwl3029_init();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	794
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	795 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	796 Set_Switch_ON_Cause();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	797 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	798
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	799
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	800 /* Turn on DRP We will make VRMCC to device group Modem
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	801 * And Switch it on.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	802 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	803 bspTwl3029_Power_setDevGrp(NULL,BSP_TWL3029_POWER_VRMMC,BSP_TWL3029_POWER_DEV_GRP_MODEM);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	804 wait_ARM_cycles(convert_nanosec_to_cycles(100000*2));
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	805 bspTwl3029_Power_enable(NULL,BSP_TWL3029_POWER_VRMMC,BSP_TWL3029_POWER_STATE_ACTIVE);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	806 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	807
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	808 #if (CHIPSET!=15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	809 #if ABB_SEMAPHORE_PROTECTION
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	810 // Create the ABB semaphore
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	811 ABB_Sem_Create();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	812 #endif // SEMAPHORE_PROTECTION
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	813 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	814
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	815 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	816 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	817 * Initialize FFS invoking restore procedure by MPU-S
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	818 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	819 #if ((BOARD == 35) \|\| (BOARD == 46))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	820 GC_FfsRestore();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	821 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	822
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	823 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	824 * FFS main initialization.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	825 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	826
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	827 ffs_main_init();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	828
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	829
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	830 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	831 * Initialize Riviera manager and create tasks thanks to it.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	832 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	833 #if (CHIPSET!=15) \|\| (REMU==0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	834 rvf_init();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	835 rvm_init(); /* A-M-E-M-D-E-D! */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	836 create_tasks();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	837 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	838 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	839 * SIM Main Initialization.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	840 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	841 #if (CHIPSET!=15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	842 SIM_Initialize ();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	843 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	844 bspUicc_bootInit();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	845 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	846 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	847 }
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	848
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	849 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	850 * Init_Serial_Flows
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	851 *
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	852 * Performs Serialswitch + related serial data flows initialization.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	853 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	854 void Init_Serial_Flows (void)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	855 {
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	856 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	857
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	858 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	859 * Initialize Serial Switch module.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	860 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	861 #if ((BOARD==35) \|\| (BOARD == 46))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	862 SER_InitSerialConfig (GC_GetSerialConfig());
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	863 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	864 SER_InitSerialConfig (&appli_ser_cfg_info);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	865 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	866 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	867 * Then Initialize the Serial Data Flows and the associated UARTs:
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	868 * - G2-3 Trace if GSM/GPRS Protocol Stack
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	869 * - AT-Cmd/Fax & Data Flow
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	870 *
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	871 * Layer1/Riviera Trace Flow and Bluetooth HCI Flow are initialized
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	872 * by the appropriate SW Entities.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	873 *
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	874 * G2-3 Trace => No more Used
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	875 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	876 SER_tr_Init(SER_PROTOCOL_STACK, TR_BAUD_38400, NULL);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	877
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	878 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	879 * Fax & Data / AT-Command Interpreter Serial Data Flow Initialization
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	880 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	881
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	882 #if ((BOARD != 35) && (BOARD != 46))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	883 (void) SER_fd_Initialize ();
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	884 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	885 #else /* OP_L1_STANDALONE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	886
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	887 #if (TESTMODE \|\| (TRACE_TYPE==1) \|\| (TRACE_TYPE==2) \|\| (TRACE_TYPE==3) \|\| (TRACE_TYPE==6) \|\| (TRACE_TYPE==7))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	888 #if ((BOARD == 35) \|\| (BOARD == 46))
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	889 ser_cfg_info[UA_UART_0] = '0';
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	890 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	891 ser_cfg_info[UA_UART_0] = 'G';
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	892 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	893 #if (CHIPSET !=15)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	894 ser_cfg_info[UA_UART_1] = 'R'; // Riviear Demux on UART MODEM
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	895 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	896 ser_cfg_info[UA_UART_0] = 'R'; // Riviear Demux on UART MODEM
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	897 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	898
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	899 /* init Uart Modem */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	900 SER_InitSerialConfig (&appli_ser_cfg_info);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	901
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	902 #if TESTMODE \|\| (TRACE_TYPE == 1) \|\| (TRACE_TYPE == 7)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	903 SER_tr_Init (SER_LAYER_1, TR_BAUD_115200, rvt_activate_RX_HISR);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	904
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	905 rvt_register_id("OTHER",&trace_id,(RVT_CALLBACK_FUNC)NULL);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	906 #else
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	907 SER_tr_Init (SER_LAYER_1, TR_BAUD_38400, NULL);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	908 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	909
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	910 L1_trace_string(" \n\r");
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	911
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	912 #endif /* TRACE_TYPE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	913
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	914 #endif /* OP_L1_STANDALONE */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	915 }
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	916
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	917 /*
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	918 * Init_Unmask_IT
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	919 *
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	920 * Unmask all used interrupts.
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	921 */
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	922 void Init_Unmask_IT (void)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	923 {
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	924 IQ_Unmask(IQ_FRAME);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	925 IQ_Unmask(IQ_UART_IRDA_IT);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	926 IQ_Unmask(IQ_UART_IT);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	927 IQ_Unmask(IQ_ARMIO);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	928 #if (L1_DYN_DSP_DWNLD == 1)
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	929 IQ_Unmask(IQ_API);
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	930 #endif
b6a5e36de839 src/cs: initial import from Magnetite Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	931 }

FreeCalypso > hg > fc-selenite

annotate src/cs/system/main/init.c @ 112:fdecfb3bd860