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annotate src/cs/drivers/drv_app/lcc/lcc_modulate.c @ 112:fdecfb3bd860

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.../drv_app/r2d/r2d_*.c: LCD include case fixes from Magnetite R2D is not used in Selenite, but we strive to keep the two source trees in sync as much as possible to reduce the diffs.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 13 Oct 2018 16:56:22 +0000
parents b6a5e36de839
children
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b6a5e36de839 src/cs: initial import from Magnetite
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1 /******************************************************************************
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2 * Power Task (pwr)
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3 * Design and coding by Svend Kristian Lindholm, skl@ti.com
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4 *
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5 * PWR SW Modulation
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6 *
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7 * $Id: pwr_modulate.c 1.1 Wed, 20 Aug 2003 10:22:37 +0200 skl $
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8 *
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9 ******************************************************************************/
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10 #include <string.h>
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11 #include "lcc/lcc.h"
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12 #include "lcc/lcc_trace.h"
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13 #include "lcc/lcc_modulate.h"
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14 #include "lcc/lcc_cfg_i.h"
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15 #include "lcc/lcc_cfg.h"
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16 #include "rv/rv_defined_swe.h"
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17 #include "abb/abb.h"
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18
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19 /******************************************************************************
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20 * Function prototypes
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21 ******************************************************************************/
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22
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23 void pwr_modulate_init(void);
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24 void pwr_modulate_on(void);
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25 void pwr_modulate_off(void);
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26
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27
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28 #if (USE_Q401_CHG_CIRCUIT == 1)
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29 extern T_PWR_CFG_BLOCK *pwr_cfg;
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30 #endif
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31
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32 void pwr_modulate_init(void) {
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33 ttw(ttr(TTrEventLow,"pwr_modulate_init(%d)" NL, 0));
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34 #if (USE_PWL_AS_MODULATOR == 1)
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35 BUZZ_LIGHT_REG |= 0x02;
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36 PWL_LEVEL_REG = 0xFF; // Full envelope function
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37 PWL_CTRL_REG = 0x00; // No 32KHz clock
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38 #else
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39 // Set GPIO 6 HIGH
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40 *((volatile uint16 *) 0xfffe4806) |= 0x0020; // Enable GPIO module
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41 *((volatile uint16 *) 0xfffe4804) &= 0xffbf; // Set GPIO-6 = output
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42 *((volatile uint16 *) 0xfffe4802) |= 0x0080; // Set GPIO-6 = HIGH
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43 #endif
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44 ttw(ttr(TTrEventLow,"pwr_modulate_init(%d)" NL, 0xff));
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45 }
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46
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47 void pwr_modulate_on(void) {
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48 ttw(ttr(TTrEventLow,"pwr_modulate_on(%d)" NL, 0));
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49 #if (USE_Q401_CHG_CIRCUIT== 1)
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50 /* Program the DAC with the constant current value taken from /pwr/chg/chg<N>.cfg multiplied by k/255, where current k is in [1..255] */
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51 ABB_Write_Register_on_page(PAGE0, CHGREG, (pwr_cfg->data.k * pwr_cfg->chg.ichg_max) / 255);
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52 #endif
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53 #if (USE_Q402_CHG_CIRCUIT == 1)
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54 #if (USE_PWL_AS_MODULATOR == 1)
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55 BUZZ_LIGHT_REG |= 0x02;
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56 PWL_LEVEL_REG = 0xFF; // Full envelope function
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57 PWL_CTRL_REG = 0x00; // No 32KHz clock
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58 #else
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59 // Use GPIO 6
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60 *((volatile uint16 *) 0xfffe4806) |= 0x0020; // Enable GPIO module
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61 *((volatile uint16 *) 0xfffe4804) &= 0xffbf; // Set GPIO-6 = output
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62 *((volatile uint16 *) 0xfffe4802) |= 0x0080; // Set GPIO-6 = HIGH
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63 #endif
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64 #endif
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65 ttw(ttr(TTrEventLow,"pwr_modulate_on(%d)" NL, 0xFF));
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66
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67 }
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68
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69 void pwr_modulate_off(void) {
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70 ttw(ttr(TTrEventLow,"pwr_modulate_off(%d)" NL, 0));
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71 #if (USE_Q401_CHG_CIRCUIT == 1)
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72 // Don't do anything - FET is fully controlled in pwr_modulate_on()
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73 #endif
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74 #if (USE_Q402_CHG_CIRCUIT == 1)
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75 #ifdef USE_PWL_AS_MODULATOR
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76 BUZZ_LIGHT_REG &= 0xfd;
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77 PWL_LEVEL_REG = 0x00; // No envelope function
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78 PWL_CTRL_REG = 0x00; // No 32KHz clock
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79 #else
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80 // Use GPIO 6
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81 *((volatile uint16 *) 0xfffe4806) |= 0x0020; // Enable GPIO module
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82 *((volatile uint16 *) 0xfffe4804) &= 0xffbf; // Set GPIO-6 = output
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83 *((volatile uint16 *) 0xfffe4802) &= 0x007f; // Set GPIO-6 = LOW
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84 #endif
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85 #endif
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86 ttw(ttr(TTrEventLow,"pwr_modulate_off(%d)" NL, 0xFF));
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87 }
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88