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annotate src/cs/layer1/p_include/l1p_cons.h @ 134:7d50d8d13711

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FFS code sync with Magnetite + gcc version fix This change brings the new flash autodetection for FC and Pirelli targets from Magnetite, and should also fix the gcc version for C1xx and gtamodem targets, which were previously broken because they used TI's original flash autodetect code (which operates at address 0) while the boot ROM is mapped there.
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 11 Dec 2018 08:43:25 +0000
parents b6a5e36de839
children
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1P_CONS.H
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4 *
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5 * Filename l1p_cons.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 // TBF allocations...
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11 #define DL_TBF 0
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12 #define UL_TBF 1
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13 #define BOTH_TBF 2
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14 #define SINGLE_BLOCK_DL 3
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15 #define SINGLE_BLOCK_UL 4
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16 #define TWO_PHASE_ACCESS 5
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17 #define NO_TBF 6
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18
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19 // MAC modes...
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20 #define DYN_ALLOC 0
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21 #define EXT_DYN_ALLOC 1
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22 #define FIX_ALLOC_NO_HALF 2
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23 #define FIX_ALLOC_HALF 3
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24
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25 // First task after the Idle frame...
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26 #define RX_TASK 1
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27 #define TX_TASK 2
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28
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29 // Status for interference measurement frame
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30 #define ANY_IDLE_FRAME 0
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31 #define PTCCH_FRAME 1
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32 #define SEARCH_FRAME 2
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33
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34 // No measurement status
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35 #define NO_MEAS 0x80
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36
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37 // Multislot bit of BBCTRL ABB register to set the multislot mode
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38 #if (ANLG_FAM == 1)
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39 #define B_MSLOT (0x40<<6)
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40 #endif
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41 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3))
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42 #define B_MSLOT (0x20<<6)
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43 #endif
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44
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45 //----------------------------------------
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46 // LAYER 1 Asynchronous processes names...
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47 //----------------------------------------
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48 #define NBR_L1PA_PROCESSES 11
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49
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50 #define PI_SCP 0 // l1pa_idle_paging_process(msg)
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51 #define TRANSFER 1 // l1pa_transfer_process(msg)
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52 #define P_ACC 2 // l1pa_access_process(msg)
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53 #define P_POLL 3 // l1pa_idle_packet_polling_process(msg)
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54 #define SCPB 4 // l1pa_serving_cell_pbcch_read_process(msg)
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55 #define CR_MEAS 5 // l1pa_cr_meas_process(msg)
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56 #define TCR_MEAS 6 // l1pa_tcr_meas_process(msg)
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57 #define PI_INT_MEAS 7 // l1pa_idle_interference_meas_process(msg)
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58 #define PT_INT_MEAS 8 // l1pa_transfer_interference_meas_process(msg)
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59 #define NCPB 9 // l1pa_neighbor_cell_pbcch_read_process(msg)
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60 #define PI_SMSCB 10 // l1pa_idle_smscb_process(msg)
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61
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62 // Constants for PRACH
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63 #define ACC_BURST_8 0
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64 #define ACC_BURST_11 1
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65
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66 #define DYN_PRACH_ALLOC 1
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67 #define FIX_PRACH_ALLOC 2
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68
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69 // DSP CS types (CHED)
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70 //TABLE/ UL CS
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71 #define CS_NONE_TYPE 0 //NAME/ No block
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72 #define CS_AUTO_DETECT 1 //NAME/ N/A
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73 #define CS1_TYPE_DATA 2 //NAME/ CS1
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74 #define CS1_TYPE_POLL 3 //NAME/ Poll NB
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75 #define CS2_TYPE 4 //NAME/ CS2
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76 #define CS3_TYPE 5 //NAME/ CS3
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77 #define CS4_TYPE 6 //NAME/ CS4
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78 #define CS_PAB8_TYPE 7 //NAME/ PRACH 8bit
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79 #define CS_PAB11_TYPE 8 //NAME/ PRACH 11bit
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80 //END_TABLE/
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81
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82 // USF decoding for PRACH
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83 #define USF_INVALID 0
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84 #define USF_GOOD 1
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85 #define USF_BAD 2
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86 #define USF_FREE 7
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87
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88 // DSP tasks
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89 #define DL_PDSP_TASK 2 // Downlink task (Normal burst or Prach).
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90 #define UL_PDSP_TASK 2 // Uplink task (Normal burst or Prach).
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91 #define PB_PDSP_TASK 3 // Power measurement Burst task.
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92
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93 // DSP tasks used in d_task_md
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94 #define INTERF_DSP_TASK 100 // Interference measurements
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95 #define INTERF1_DSP_TASK 101 // 1 Interference measurement
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96 #define INTERF2_DSP_TASK 102 // 2 Interference measurement
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97 #define INTERF3_DSP_TASK 103 // 3 Interference measurement
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98 #define INTERF4_DSP_TASK 104 // 4 Interference measurement
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99 #define INTERF5_DSP_TASK 105 // 5 Interference measurement
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100 #define INTERF6_DSP_TASK 106 // 6 Interference measurement
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101 #define INTERF7_DSP_TASK 107 // 7 Interference measurement
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102 #define INTERF8_DSP_TASK 108 // 8 Interference measurement
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103 #define PTCCHD_DSP_TASK 109 // PTCCH DL
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104 #define PTCCHU_DSP_TASK 110 // PTCCH UL
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105 #define PTCCHDU_DSP_TASK 111 // PTCCH DL and UL
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106
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107 //---------------------------------------------
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108 // PTCCH activities
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109 //---------------------------------------------
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110 #define PTCCH_DL_BIT 0 // PTCCH DL bit position
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111 #define PTCCH_UL_BIT 1 // PTCCH UL bit position
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112
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113 #define PTCCH_DL (TRUE_L << PTCCH_DL_BIT)
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114 #define PTCCH_UL (TRUE_L << PTCCH_UL_BIT)
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115
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116 //---------------------------------------------
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117 // SINGLE activities
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118 //---------------------------------------------
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119 #define ALL_SINGLE 0xFF
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120 #define SINGLE_DL_BIT 0 // SINGLE DL bit position
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121 #define SINGLE_UL_BIT 1 // SINGLE UL bit position
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122
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123 #define SINGLE_DL (TRUE_L << SINGLE_DL_BIT)
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124 #define SINGLE_UL (TRUE_L << SINGLE_UL_BIT)
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125
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126 #define SINGLE_DL_MASK ALL_TASK ^ SINGLE_DL
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127 #define SINGLE_UL_MASK ALL_TASK ^ SINGLE_UL
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parents:
diff changeset
128
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 //---------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 // Status for MPHP_SINGLE_BLOCK_CON
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 //---------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 #define SINGLE_UL_DONE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 #define SINGLE_STI_PASSED 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 #define SINGLE_NO_TA 2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 #define SINGLE_DL_DONE 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 //---------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 // MCU-DSP bit-field bit position definitions
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 //---------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 // d_task_u_gprs...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 #define B_ACCESS_PRACH 13
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 #define B_PTCCH_UL 14
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 // d_task_d_gprs...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 #define B_PTCCH_DL 14
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 // d_sched_mode_gprs...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 #define B_SWITCH 0 // Bit 0: switch to GPRS, Bit 1: switch to GSM.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 #define B_MAC_MODE 2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 #define B_RIF_RX_MODE 5
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 // a_ctrl_abb_gprs or d_ptcchu_ctrl_abb_gprs...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 #define B_RAMP_GPRS 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 #define B_APCDEL2_GPRS 2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 #define B_APCDEL1_GPRS 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 #define B_AFC_GPRS 4
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 #define B_RAMP_NB_GPRS 5
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 #define B_MS_RULE 8 // set an additionnal interrupt for the DSP
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 //---------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 // LAYER 1 PACKET PERIODIC MEASUREMENT TASKS...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 //---------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 #define P_CRMS 0 // Packet Periodic Measurements task in Idle mode.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 #define P_TCRMS 1 // Neighbour Measurement in Packet Transfer mode.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 #define P_CRMS_MEAS (TRUE_L << P_CRMS) // Set Packet Periodic Measurements task
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 #define P_TCRMS_MEAS (TRUE_L << P_TCRMS) // Set Neighbour Measurement Packet Transfer task
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 #define P_CRMS_MEAS_MASK ALL_TASK ^ P_CRMS_MEAS // Mask Packet Periodic Measurement task
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 #define P_TCRMS_MEAS_MASK ALL_TASK ^ P_TCRMS_MEAS // Mask Neighbour Measurement Packet Transfer task
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 //--------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 // Paging macro definition
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 //--------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 //-- Paging States used for PPCH reading blocks
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 #define PPCH_POS_NOT_COMP 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 #define PPCH_POS_COMP 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 //-- Maximum Number of Packet Paging Blocks
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 #define MAX_NBR_PG_BLKS 11
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 //-- Paging Block index max
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 #define MAX_PG_BLKS_INDEX 10
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 //--------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 // PBCCH macro definition
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 //--------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 //-- Maximum Number of PBCCH Blocks
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 #define MAX_NBR_PB_BLKS 4
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 //-- PBCCH index max
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 #define MAX_PB_BLKS_INDEX 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 /*--------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 /* Position of different blocs in a MF52. */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 /*--------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 #define PCCCH_0 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 #define PCCCH_1 4
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 #define PCCCH_2 8
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 #define PCCCH_3 13
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 #define PCCCH_4 17
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 #define PCCCH_5 21
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #define PCCCH_6 26
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 #define PCCCH_7 30
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 #define PCCCH_8 34
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 #define PCCCH_9 39
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 #define PCCCH_10 43
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 #define PCCCH_11 47
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 //-- PBCCH block position
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 #define B0_POSITION 0L
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 #define B11_POSITION 47L
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 // Power measurement constants
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 // mode for power measurements
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 #define PACKET_IDLE 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 #define PACKET_TRANSFER 2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 // number of meas
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 #define NB_MEAS_PACKET_IDLE 4 // Normal case 1RX + 3PW, if no RX=> 4PW
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 // TX burst types
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 #define TX_NB_BURST 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 #define TX_RA_BURST 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 // No power control packet transfer AGC algorithm phases
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 #define SEARCH 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 #define TRACK 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 /*--------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 /* API addresses......................... */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 /*--------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 #define DSP_API_ADDRESS_BASE 0x00000800L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 #define ARM_API_ADDRESS_BASE 0xFFD00000L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 // Herebelow we define the MCU/DSP interface addresses as seen
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 // by the DSP (DSP address space) considering address 0 basis.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 #define DSP_MAP_DB_W_PAGE_0_GPRS 0x00000050L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 #define DSP_MAP_DB_W_PAGE_1_GPRS 0x00000064L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 #define DSP_MAP_DB_R_PAGE_0_GPRS 0x00000078L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 #define DSP_MAP_DB_R_PAGE_1_GPRS 0x0000009CL //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 #define DSP_MAP_NDB_ADR_GPRS 0x000001AEL //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 #define DSP_MAP_PARAM_ADR_GPRS 0x00000480L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 #define DSP_MAP_DB_W_PAGE_0_GPRS 0x000004ADL //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 #define DSP_MAP_DB_W_PAGE_1_GPRS 0x000004C1L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 #define DSP_MAP_DB_R_PAGE_0_GPRS 0x000004D5L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 #define DSP_MAP_DB_R_PAGE_1_GPRS 0x000004F9L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 #define DSP_MAP_NDB_ADR_GPRS 0x00000056L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 #define DSP_MAP_PARAM_ADR_GPRS 0x000001F1L //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 // Herebelow we define the MCU/DSP interface addresses as seen
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 // by the MCU (ARM address space) considering .
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 #define DB_W_PAGE_0_GPRS (ARM_API_ADDRESS_BASE + (DSP_MAP_DB_W_PAGE_0_GPRS * 2)) //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 #define DB_W_PAGE_1_GPRS (ARM_API_ADDRESS_BASE + (DSP_MAP_DB_W_PAGE_1_GPRS * 2)) //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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260 #define DB_R_PAGE_0_GPRS (ARM_API_ADDRESS_BASE + (DSP_MAP_DB_R_PAGE_0_GPRS * 2)) //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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261 #define DB_R_PAGE_1_GPRS (ARM_API_ADDRESS_BASE + (DSP_MAP_DB_R_PAGE_1_GPRS * 2)) //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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262 #define NDB_ADR_GPRS (ARM_API_ADDRESS_BASE + (DSP_MAP_NDB_ADR_GPRS * 2)) //
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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263 #define PARAM_ADR_GPRS (ARM_API_ADDRESS_BASE + (DSP_MAP_PARAM_ADR_GPRS * 2)) //