# HG changeset patch
# User Mychaela Falconia <falcon@freecalypso.org>
# Date 1502042293 0
# Node ID d5a34ea92f2a0ce9e1c4b1cf11c23c54a9b07ab0
# Parent  a498108254c90116cbf7e0275f06079a90502e44
init.c: Init_Unmask_IT() reconstructed the trivial way

diff -r a498108254c9 -r d5a34ea92f2a src/cs/system/Main/init.c
--- a/src/cs/system/Main/init.c	Sun Aug 06 17:08:19 2017 +0000
+++ b/src/cs/system/Main/init.c	Sun Aug 06 17:58:13 2017 +0000
@@ -791,152 +791,10 @@
 }
 
 /*
- * Init_Unmask_IT
- *
- * Unmask all used interrupts.
- */
-
-void Init_Unmask_IT (void)
-{
-  #if (CODE_VERSION != SIMULATION)
-    /* Reset all current interrupts */
-    #if (CHIPSET == 12) || (CHIPSET == 15)
-      F_INTH2_VALID_NEXT(C_INTH_IRQ);   /* Reset current IT in INTH2 IRQ */
-      F_INTH_VALID_NEXT(C_INTH_IRQ);   /* Reset current IT in INTH IRQ */
-      F_INTH_VALID_NEXT(C_INTH_FIQ);   /* Reset current IT in INTH FIQ */
-      F_INTH_RESET_ALL_IT;   /* Reset all IRQ/FIQ source */
-    #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
-      INTH_RESETALLIT;
-      INTH_CLEAR;                 /* reset IRQ/FIQ source */
-    #endif
-
-    // Disable all the IRQs of ARM before unmasking the interrupts. And enable them once the unmasking is
-    // complete. This will ensure that no context switch happens due to coming of an already unmasked interrupt
-    // before completing the unmasking of the rest of the interrupts. If the context switch happens in
-    // before all the interrupts have been unmasked, then the control will never return to this function
-    //since it will go to TCT_Scheduler() and so some interrupts may remain masked.
-    INT_DisableIRQ();
-
-    // SL: TEMPORARY FIX FOR BUG ON P2
-    // FRAME INTERRUPT STAY MASKED
-    #if ((BOARD == 35) || (BOARD == 46))
-      INTH_ENABLEONEIT(IQ_FRAME);
-    #endif
-    // TEMPORARY FIX FOR BUG ON P2
-
-
-    /* Enable Uart Modem and IrDA interrupts */
-    #if ((((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || \
-          (TESTMODE) || (TRACE_TYPE==7)) && (OP_L1_STANDALONE == 1)) || \
-         (OP_L1_STANDALONE == 0))
-
-      #if (CHIPSET == 12) || (CHIPSET == 15)
-        F_INTH_ENABLE_ONE_IT (C_INTH_UART_IRDA_IT);   /* Enable UART_IRDA interrupts */
-        #if (CHIPSET == 12)
-        	F_INTH_ENABLE_ONE_IT(C_INTH_UART_MODEM1_IT);   /* Enable UART_MODEM interrupts */
-	#endif
-      #else
-      	#if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || \
-             (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
-          #if ((BOARD != 35) && (BOARD != 46))
-            INTH_ENABLEONEIT (IQ_UART_IRDA_IT);   /* Enable UART_IRDA interrupts */
-          #endif
-        #endif
-        	INTH_ENABLEONEIT (IQ_UART_IT);   /* Enable UART_MODEM interrupts */
-      #endif
-
-      #if (OP_L1_STANDALONE == 1)
-        #if (CHIPSET == 12)
-          F_INTH_ENABLE_ONE_IT (C_INTH_UART_MODEM2_IT);   /* Enable UART_MODEM2 interrupts */
-        #endif
-      #endif   /* (OP_L1_STANDALONE == 1) */
-
-    #endif   /* (TRACE_TYPE ...) || (OP_L1_STANDALONE == 0) */
-
-    /* Enable other interrupts */
-    #if (OP_L1_STANDALONE == 1)
-      if (l1_config.pwr_mngt == PWR_MNGT)
-      {
-
-        #if GEMINI_TIMER
-          #if (CHIPSET == 12) || (CHIPSET == 15)
-            F_INTH_ENABLE_ONE_IT(C_INTH_TIMER1_IT);   /* Enable Timer1 interrupt */
-          #else
-            INTH_ENABLEONEIT(IQ_TIM1);   /* Enable Timer1 interrupt */
-          #endif
-        #endif
-
-        #if EXT_IRQ
-          #if (CHIPSET == 12) || (CHIPSET == 15)
-            F_INTH_ENABLE_ONE_IT (C_INTH_ABB_IRQ_IT);   /* Enable ABB_IRQ_IT EXT_IRQ */
-          #else
-            INTH_ENABLEONEIT(IQ_EXT);   /* Enable External interrupt */
-          #endif
-      #endif
-      }
-
-    #else
-      #if ((CHIPSET == 12) || (CHIPSET == 15))
-        F_INTH_ENABLE_ONE_IT(C_INTH_KEYBOARD_IT);
-      #else
-        #if ((BOARD == 35) || (BOARD == 46))
-          INTH_ENABLEONEIT (IQ_ICR);
-        #else
-          INTH_ENABLEONEIT (IQ_ARMIO);   /* Enable Keypad/GPIO Interrupt */
-        #endif
-      #endif   /* (CHIPSET == 12) */
-    #endif   /* OP_L1_STANDALONE */
-
-
-      #if (CHIPSET == 12) || (CHIPSET == 15)
-        //enable LEAD2 interrupt
-        F_INTH_ENABLE_ONE_IT (C_INTH_API_IT);
-      #else
-        //enable LEAD2 interrupt
-        INTH_ENABLEONEIT(IQ_API);
-      #endif
-
-
-    /* Enable TDMA interrupt */
-    #if ((CHIPSET == 12) || (CHIPSET == 15))
-	 #if (PSP_STANDALONE == 0)
-      F_INTH_ENABLE_ONE_IT (C_INTH_FRAME_IT);
-	 #endif
-    #else
-      INTH_ENABLEONEIT(IQ_FRAME);
-    #endif
-//-->  to enable DMA Interrupt for Lite
-	#if ((CHIPSET == 15) )
-		 #if (LOCOSTO_LITE == 1)
-      			F_INTH_ENABLE_ONE_IT (C_INTH_DMA_IT);
-	 	#endif
-    	#endif
-//<--  to enable DMA Interrupt for Lite
-
-    #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) )
-      #if (CHIPSET == 12) || (CHIPSET == 15)
-        F_INTH_ENABLE_ONE_IT(C_INTH_API_IT);  // Enable API interrupt
-      #elif (CHIPSET == 10)
-        #if (L1_DYN_DSP_DWNLD == 1)
-
-         //enable interrupt
-         INTH_ENABLEONEIT (IQ_API);
-
-        #endif // L1_DYN_DSP_DWNLD == 1
-      #endif // CHIPSET
-    #endif  // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC ==1) || (L1_DYN_DSP_DWNLD == 1)
-    // Enable the ARM IRQs once all the interrupts have been unmasked.
-    INT_EnableIRQ();
-  #endif   /* NO SIMULATION */
-}
-
-
-/*
  * Init_Serial_Flows
  *
  * Performs Serialswitch + related serial data flows initialization.
  */
-
 void Init_Serial_Flows (void)
 {
   #if (OP_L1_STANDALONE == 0)
@@ -999,3 +857,19 @@
 
   #endif   /* OP_L1_STANDALONE */
 }
+
+/*
+ * Init_Unmask_IT
+ *
+ * Unmask all used interrupts.
+ */
+void Init_Unmask_IT (void)
+{
+	IQ_Unmask(IQ_FRAME);
+	IQ_Unmask(IQ_UART_IRDA_IT);
+	IQ_Unmask(IQ_UART_IT);
+	IQ_Unmask(IQ_ARMIO);
+#if (L1_DYN_DSP_DWNLD == 1)
+	IQ_Unmask(IQ_API);
+#endif
+}