# HG changeset patch # User Mychaela Falconia # Date 1560737477 0 # Node ID a7ed7d4483b07e1acd073082cf8b81e0b7cec866 # Parent b13731665274fb77a2adc9213aec34f3d9833711 main assembly boot path code: MEMIF change for 26 MHz targets as explained in the MEMIF-wait-states document diff -r b13731665274 -r a7ed7d4483b0 components/main --- a/components/main Mon Jun 17 01:36:38 2019 +0000 +++ b/components/main Mon Jun 17 02:11:17 2019 +0000 @@ -77,4 +77,11 @@ ASMFLAGS="$ASMFLAGS -dC155_TARGET=0" fi +if [ "$RF" = 12 ] +then + ASMFLAGS="$ASMFLAGS -dVCXO_26MHZ=1" +else + ASMFLAGS="$ASMFLAGS -dVCXO_26MHZ=0" +fi + asm_file $SRCDIR/int.s diff -r b13731665274 -r a7ed7d4483b0 components/main-init --- a/components/main-init Mon Jun 17 01:36:38 2019 +0000 +++ b/components/main-init Mon Jun 17 02:11:17 2019 +0000 @@ -85,4 +85,11 @@ ASMFLAGS="$ASMFLAGS -dC155_TARGET=0" fi +if [ "$RF" = 12 ] +then + ASMFLAGS="$ASMFLAGS -dVCXO_26MHZ=1" +else + ASMFLAGS="$ASMFLAGS -dVCXO_26MHZ=0" +fi + asm_file $SRCDIR/int.s diff -r b13731665274 -r a7ed7d4483b0 src/cs/system/main/init.asm --- a/src/cs/system/main/init.asm Mon Jun 17 01:36:38 2019 +0000 +++ b/src/cs/system/main/init.asm Mon Jun 17 02:11:17 2019 +0000 @@ -170,9 +170,19 @@ .elseif BOARD = 41 +; FreeCalypso change, please see MEMIF-wait-states document +; in the freecalypso-docs repository for the explanation. + + .if VCXO_26MHZ = 1 +CS0_MEM_REG .short 0x2a2 ; 1 Dummy Cycle 16 bit 2 WS SW BP enable +CS1_MEM_REG .short 0x2a2 ; 1 Dummy Cycle 16 bit 2 WS SW BP enable +CS2_MEM_REG .short 0x2a2 ; 1 Dummy Cycle 16 bit 2 WS SW BP enable + .else CS0_MEM_REG .short 0x2a1 ; 1 Dummy Cycle 16 bit 1 WS SW BP enable CS1_MEM_REG .short 0x2a1 ; 1 Dummy Cycle 16 bit 1 WS SW BP enable CS2_MEM_REG .short 0x2a1 ; 1 Dummy Cycle 16 bit 1 WS SW BP enable + .endif + CS3_MEM_REG .short 0x283 ; 1 Dummy Cycle 8 bit 3 WS SW BP enable CS4_MEM_REG .short 0xe85 ; default reset value