FreeCalypso > hg > fc-magnetite
view src/cs/layer1/p_include/l1p_vare.h @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 19 Jan 2020 01:41:35 +0000 |
| parents | 945cf7f506b2 |
| children |
line wrap: on
line source
/************* Revision Controle System Header ************* * GSM Layer 1 software * L1P_VAREX.H * * Filename l1p_vare.h * Copyright 2003 (C) Texas Instruments * ************* Revision Controle System Header *************/ #ifdef L1P_ASYN_C #if (LONG_JUMP == 3) #pragma DATA_SECTION(l1ps,".l1s_global") #pragma DATA_SECTION(l1pa_l1ps_com,".l1s_global") #pragma DATA_SECTION(l1ps_macs_com,".l1s_global") #pragma DATA_SECTION(l1ps_dsp_com,".l1s_global") #endif // Global Packet L1A structure T_L1PA_GLOBAL l1pa; // Global Packet L1S structure T_L1PS_GLOBAL l1ps; // Common structure between L1A and L1S in packet mode T_L1PA_L1PS_COM l1pa_l1ps_com; // Communication between L1S and MAC-S in packet mode T_L1PS_MACS_COM l1ps_macs_com; // MCU / DSP interface T_L1PS_DSP_COM l1ps_dsp_com; #else extern T_L1PA_GLOBAL l1pa; extern T_L1PS_GLOBAL l1ps; extern T_L1PA_L1PS_COM l1pa_l1ps_com; extern T_L1PS_DSP_COM l1ps_dsp_com; extern T_L1PS_MACS_COM l1ps_macs_com; #endif
