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view src/cs/layer1/dyn_dwl_include/l1_dyn_dwl_const.h @ 635:baa0a02bc676

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niq32.c DTR handling restored for targets that have it TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a fixed pull-down resistor on this GPIO line), and the code in niq32.c called UAF_DTRInterruptHandler() (implemented in uartfax.c) from the IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official fw this GPIO is a floating input, all of the DTR handling code in uartfax.c including the interrupt logic is still there, but the hobbled TCS211-20070608 semi-src delivery which OM got from TI contained a change in niq32.c (which had been kept in FC until now) that removed the call to UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test" hacks. The present change fixes this bug at a long last: if we are building fw for a target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c, whereas if we are building fw for a target that does not use this classic GPIO arrangement, the code in niq32.c goes back to what we got from OM and all DTR & DCD code in uartfax.c is conditioned out. This change also removes the very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 19 Jan 2020 01:41:35 +0000
parents 50a15a54801e
children
line wrap: on
line source

/************* Revision Controle System Header *************
 *                  GSM Layer 1 software 
 * L1_DYN_DWL_CONST.H
 *
 *        Filename l1_dyn_dwl_const.h.h
 *  Copyright 2004 (C) Texas Instruments
 *
 ************* Revision Controle System Header *************/
#if (L1_DYN_DSP_DWNLD == 1)

#ifndef _L1_DYN_DWL_CONST_H_
#define _L1_DYN_DWL_CONST_H_

/* DSP dynamic download background task id */
#define C_BGD_DSP_DYN_DWNLD   9

#define RED                                1
#define GREEN                              0
#define MAX_NUM_OF_PATCH_IDS               5
#define MAX_NUM_OF_SEMAPHORES              6

#define NUM_OF_DYN_DWNLD_PRIMITIVES 6

#define NUM_WORDS_COPY_API                 256     // even value mandatory
#define START_API_DWNLD_AREA               0x1808  // 0x1808
#define SIZE_API_DWNLD_AREA                0x7F8   // 0x800
#define START_API_DWNLD_AREA_DURING_E2     0x10C1  // 0x10BE
#define SIZE_API_DWNLD_AREA_DURING_E2      0x15B   // 0x410
#define MCU_API_BASE_ADDRESS               0xFFD00000L
#define DSP_API_BASE_ADDRESS               0x800


/* Dynamic Download API base address */
#define C_DYN_DWNLD_API_BASE_ADDRESS       0x17F6
#define HEADER_PATCH_SIZE                  4

#if(CODE_VERSION == SIMULATION)
  #define CRC_SIMU_OK           0xCAFE
  #define SIZE_DWNLD_AREA_SIMU  2048
#endif

#define TRUE  1
#define FALSE 0


/* Define commands MCU/DSP*/
#define C_DWL_DOWNLOAD_CTRL_DSP_ACK   0
#define C_DWL_DOWNLOAD_CTRL_DOWNLOAD  1
#define C_DWL_DOWNLOAD_CTRL_INSTALL   2
#define C_DWL_DOWNLOAD_CTRL_UNINSTALL 3
#define C_DWL_DOWNLOAD_CTRL_ABORT     4
#define C_DWL_DOWNLOAD_CTRL_INIT      5
#define C_DWL_ERR_RESET               0

#endif  // _L1_DYN_DWL_CONST_H_
#endif // L1_DYN_DSP_DWNLD