FreeCalypso > hg > fc-magnetite
view src/cs/drivers/drv_app/fchg/fchg_struct.h @ 662:8cd8fd15a095
SIM speed enhancement re-enabled and made configurable
TI's original code supported SIM speed enhancement, but Openmoko had it
disabled, and OM's disabling of speed enhancement somehow caused certain
SIM cards to start working which didn't work before (OM's bug #666).
Because our FC community is much smaller in year 2020 than OM's community
was in their day, we are not able to find one of those #666-affected SIMs,
thus the real issue they had encountered remains elusive. Thus our
solution is to re-enable SIM speed enhancement and simply wait for if
and when someone runs into a #666-affected SIM once again. We provide
a SIM_allow_speed_enhancement global variable that allows SIM speed
enhancement to be enabled or disabled per session, and an /etc/SIM_spenh
file in FFS that allows it to enabled or disabled on a non-volatile
basis. SIM speed enhancement is now enabled by default.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 24 May 2020 05:02:28 +0000 |
| parents | 4c3d05866531 |
| children |
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/* * Internal structure definitions for the FCHG SWE reside here. * abb_inth.c will also need to include this header in order to * get our T_PWR_CTRL_BLOCK definition. */ #ifndef __FCHG_STRUCT_H #define __FCHG_STRUCT_H #include "rv/rv_general.h" #include "rvf/rvf_api.h" #include "fchg/fchg_common.h" struct charging_config { UINT16 start_delay; UINT16 start_thresh; UINT16 restart_thresh; UINT16 ci2cv_thresh; UINT16 cv_init_set; UINT16 cv_ctrl_loop_high; UINT16 cv_ctrl_loop_low; UINT16 cv_dac_max_incr; UINT16 cv_dac_max_decr; UINT16 cv_samples_needed; UINT16 overvoltage; UINT16 ci_current; UINT16 end_current; UINT16 ichg_max_spike; UINT16 ichg_samples_needed; UINT16 charge_time_limit; UINT16 recharge_delay; UINT16 bciconf; }; /* from original PWR SWE */ typedef struct { UINT16 bat_voltage; T_PWR_PERCENT remain_capa; } T_PWR_THRESHOLDS; #define MAX_THRESHOLDS 101 #define ICHG_AVG_WINDOW 6 typedef struct { /* RiViera boilerplate */ T_RVF_ADDR_ID addr_id; T_RVF_MB_ID prim_id; /* configuration */ struct charging_config config; BOOL config_present; T_PWR_THRESHOLDS batt_thresholds[MAX_THRESHOLDS]; UINT16 nb_thresholds; /* state */ enum fchg_state state; UINT16 batt_mv; UINT16 curr_disch_thresh; /* valid only during a charging cycle */ UINT16 i2v_offset; UINT16 cv_dac_init; UINT16 cv_dac_curr; UINT16 cv_high_vbat_count; UINT16 cv_low_vbat_count; UINT16 ichg_avg_buf[ICHG_AVG_WINDOW]; UINT16 ichg_fill_level; UINT16 ichg_ring_ptr; UINT16 ichg_average; UINT16 ichg_low_count; UINT32 start_time; } T_PWR_CTRL_BLOCK; #endif /* include guard */
