view blobs/patches/main-fchw.patch @ 629:3231dd9b38c1

armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents acb07ce22054
children
line wrap: on
line source

# This patch applies to the Init_Target() function in the init.obj module in
# main.lib; it is an example of how this code will need to be patched for
# running on our own future FreeCalypso hardware if we choose to use the same
# Spansion S71PL129NC0 flash+pSRAM MCP as used in the Pirelli DP-L10 and use
# the same memory timings as set by Pirelli's firmware.

[init.obj]

# value goes into nCS0, nCS1 and nCS3 config registers
.text 66 A4
# value goes into nCS2 config reg
.text 6C A4

# nop out the write into 0x02700000

.text 128 C0
.text 129 46