view components/l1_ext @ 605:07d0dc4431f4

bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents 838eeafb0051
children
line wrap: on
line source

# Building l1_ext.lib

CFLAGS="-g -me -pw2 -mt -o -mw"
CPPFLAGS="-DRV_TRACE_LEVEL_WARNING=2 -DTOOL_CHOICE=0 -D_TMS470"

# Includes

CPPFLAGS="$CPPFLAGS -I../config"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus"
CPPFLAGS="$CPPFLAGS -I.."
CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame/cust_os"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/buzzer"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/ffs"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/sim"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/uart"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rv"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rvt"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/services"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/services/audio"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"

# Source modules

SRCDIR=$SRC/cs/layer1

cfile_plain $SRCDIR/cfile/l1_pwmgr.c
cfile_plain $SRCDIR/cfile/l1_afunc.c
cfile_plain $SRCDIR/cfile/l1_trace.c
cfile_plain $SRCDIR/cfile/l1_init.c
cfile_plain $SRCDIR/cfile/l1_sync.c
cfile_plain $SRCDIR/cfile/l1_cmplx.c

cfile_plain $SRCDIR/tm_cfile/l1tm_async.c
cfile_plain $SRCDIR/tm_cfile/l1tm_func.c
cfile_plain $SRCDIR/tm_cfile/l1tm_stats.c

cfile_plain $SRCDIR/audio_cfile/l1audio_async.c
cfile_plain $SRCDIR/audio_cfile/l1audio_afunc.c
cfile_plain $SRCDIR/audio_cfile/l1audio_init.c
cfile_plain $SRCDIR/audio_cfile/l1audio_drive.c
cfile_plain $SRCDIR/audio_cfile/l1audio_back.c
cfile_plain $SRCDIR/audio_cfile/l1audio_abb.c

#cfile_plain $SRCDIR/gtt_cfile/l1gtt_async.c
#cfile_plain $SRCDIR/gtt_cfile/l1gtt_sync.c
#cfile_plain $SRCDIR/gtt_cfile/l1gtt_func.c
#cfile_plain $SRCDIR/gtt_cfile/l1gtt_drive.c
#cfile_plain $SRCDIR/gtt_cfile/l1gtt_init.c
#cfile_plain $SRCDIR/gtt_cfile/l1gtt_back.c
#cfile_plain $SRCDIR/gtt_cfile/l1gtt_baudot_functions.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/conv_encoder.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/conv_poly.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/ctm_receiver.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/ctm_transmitter.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/diag_interleaver.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/m_sequence.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/ucs_functions.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/diag_deinterleaver.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/fifo.c
#cfile_plain $SRCDIR/gtt_cfile/ctm/init_interleaver.c

if [ "$L1_DYN_DSP_DWNLD" = 1 ]
then
	cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_afunc.c
	cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_async.c
	cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_init.c
	cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_sync.c
	cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_apihisr.c
	cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_func.c
	cfile_plain $SRCDIR/dsp1/Dyn_dwnld/tty_patch_file36_10.c
	cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_mms_patch_file36_10.c
	cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_sch_patch_file36_10.c
	cfile_plain $SRCDIR/dsp1/Dyn_dwnld/e2_patch_file36_10.c
	cfile_plain $SRCDIR/dsp1/Dyn_dwnld/speech_acoustic_patch_file36_10.c
	cfile_plain $SRCDIR/dsp1/Dyn_dwnld/gprs_patch_file36_10.c
	cfile_plain $SRCDIR/dsp1/patch_file36_10_dyn_dwl.c
else
	cfile_plain $SRCDIR/dsp1/patch_file${DSP}_${CHIPSET}.c
fi

cfile_plain $SRCDIR/dsp1/leadboot.c

if [ "$GPRS" = 1 ]
then
	cfile_plain $SRCDIR/p_cfile/l1p_afun.c
	cfile_plain $SRCDIR/p_cfile/l1p_asyn.c
	cfile_plain $SRCDIR/p_cfile/l1p_cmpl.c
	cfile_plain $SRCDIR/p_cfile/l1p_sync.c
fi

# Different CFLAGS for l1_small.c

CFLAGS="-g -me -pw2 -mw"

cfile_plain $SRCDIR/cfile/l1_small.c

# Different again for l1_async.c

CFLAGS="-g -me -pw2 -mt -mw -o1"

cfile_plain $SRCDIR/cfile/l1_async.c