view cfg-headers/gprs/swconfig.cfg @ 605:07d0dc4431f4

bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents fd8227e3047d
children
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#ifndef __SWCONFIG_CFG__
#define __SWCONFIG_CFG__
#define ALR 1
#define BT 0
#define DP 0
#define DWNLD 1
#define GSMLITE 0
#define L1_DYN_DSP_DWNLD 1
#define LONG_JUMP 3
#define MOVE_IN_INTERNAL_RAM 1
#define OP_WCP 0
#define PMODE 2
#define RVDATA_INTERNALRAM 0
#define SRVC 1
#define TR_BAUD_CONFIG TR_BAUD_115200
#define WCP_PROF 0
#endif /* __SWCONFIG_CFG__ */