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view cdg3/fflags-locosto.h @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents c15047b3d00d
children
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/* 
+----------------------------------------------------------------------------- 
|  Project :  
|  Modul   :  fflags.h
+----------------------------------------------------------------------------- 
|  Copyright 2003 Texas Instruments Berlin, AG 
|                 All rights reserved. 
| 
|                 This file is confidential and a trade secret of Texas 
|                 Instruments Berlin, AG 
|                 The receipt of or possession of this file does not convey 
|                 any rights to reproduce or disclose its contents or to 
|                 manufacture, use, or sell anything it may describe, in 
|                 whole, or in part, without the specific written consent of 
|                 Texas Instruments Berlin, AG. 
+----------------------------------------------------------------------------- 
|  Purpose :  Define valid and invalid versions for a product release
|             include file for CCDGEN, e.g.:
|      ccdgen -h -m512 -a2 -$(ff_path)/fflags.h -o$(cdgincdir) -R$(cmdFile)
+----------------------------------------------------------------------------- 
*/
#define FF_PS_RSSI
#define SIM_PERS
#define FF_PHONE_LOCK
#define TI_PS_FF_AT_CMD_P_ECC
#define TI_PS_FF_REL99_AND_ABOVE
#undef  TI_DUAL_MODE
#define REL99
#define FF_BHO
#define TI_PS_FF_EMR
#define TI_PS_FF_RTD
#undef  FF_EGPRS
#undef  REL4
#define TI_PS_FF_TBF_EST_PACCH
#define TI_PS_FF_QUAD_BAND_SUPPORT