comparison src/cs/system/main/init.c @ 649:37396b85f3f7

init.c: MEMIF setup for Luna
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 07 May 2020 06:40:27 +0000
parents 238b67a785f2
children 711b1c6c4e72
comparison
equal deleted inserted replaced
648:337e6d3a4454 649:37396b85f3f7
555 MEM_INIT_CS0(3, MEM_DVS_16, MEM_WRITE_EN, 0); 555 MEM_INIT_CS0(3, MEM_DVS_16, MEM_WRITE_EN, 0);
556 MEM_INIT_CS1(3, MEM_DVS_16, MEM_WRITE_EN, 0); 556 MEM_INIT_CS1(3, MEM_DVS_16, MEM_WRITE_EN, 0);
557 MEM_INIT_CS2(6, MEM_DVS_16, MEM_WRITE_EN, 0); 557 MEM_INIT_CS2(6, MEM_DVS_16, MEM_WRITE_EN, 0);
558 MEM_INIT_CS3(3, MEM_DVS_16, MEM_WRITE_EN, 0); 558 MEM_INIT_CS3(3, MEM_DVS_16, MEM_WRITE_EN, 0);
559 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0); 559 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0);
560 #elif defined(CONFIG_TARGET_LUNA)
561 /*
562 * nCS0 is flash, nCS1 is XRAM, the LCD is connected to nCS3.
563 * nCS2 and nCS4 are currently unused.
564 */
565 MEM_INIT_CS0(4, MEM_DVS_16, MEM_WRITE_EN, 0);
566 MEM_INIT_CS1(4, MEM_DVS_16, MEM_WRITE_EN, 0);
567 MEM_INIT_CS2(4, MEM_DVS_16, MEM_WRITE_EN, 0);
568 MEM_INIT_CS3(5, MEM_DVS_16, MEM_WRITE_EN, 1);
569 MEM_INIT_CS4(0, MEM_DVS_8, MEM_WRITE_EN, 0);
560 #elif (CHIPSET == 8) 570 #elif (CHIPSET == 8)
561 /* 571 /*
562 * Our only Calypso C05 target is Mother Mychaela's D-Sample board. 572 * Our only Calypso C05 target is Mother Mychaela's D-Sample board.
563 * WS=3 with the ARM7 core running at 39 MHz gives us 92 ns, 573 * WS=3 with the ARM7 core running at 39 MHz gives us 92 ns,
564 * so we should be good on this board. 574 * so we should be good on this board.