FreeCalypso > hg > fc-magnetite
annotate makefile-frags/ram-link-steps @ 700:800bf29abf31
audio mode load change from Tourmaline
Our FreeCalypso universe now has two kinds of audio mode config files:
the old 164 byte kind and the new 176 byte kind. We are not enabling
L1_NEW_AEC in Magnetite, only in Tourmaline, thus 164 byte audio mode
files are still native to Magnetite. But we still desire graceful
handling of the situation when a running Magnetite fw may load a
176 byte audio mode file (presumably with new AEC config), thus we
incorporate the same audio mode loading change which we implemented
in Tourmaline: if the loaded audio mode file is of the wrong kind,
the AEC config is cleared to default disabled state.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Fri, 30 Jul 2021 03:55:52 +0000 |
| parents | 9432dd63626b |
| children |
| rev | line source |
|---|---|
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93
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
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1 ram: ramimage.srec |
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6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
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2 |
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90
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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3 link_ram.cmd: ${RAM_LINK_SCRIPT_SRC} Makefile lcfgen |
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7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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4 perl ../scripts/ti/make_cmd.pl lcfgen $@ 0 ${RAM_LINK_SCRIPT_SRC} \ |
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7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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5 ${SPECIAL_LINK_LIBS} |
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7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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6 |
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250
9432dd63626b
firmware ident and build date mechanism implemented at the build level
Mychaela Falconia <falcon@freecalypso.org>
parents:
93
diff
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7 ramimage.out: ${LIBS} build_date.obj str2ind.obj link_ram.cmd |
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90
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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8 ../toolwrap/vlnk470 -farcall -x -o $@ -m ramimage.map $^ |
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7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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9 |
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7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 ramimage.m0: ramimage.out |
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7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
11 ../toolwrap/hex470 -m -memwidth 16 -romwidth 16 $< |
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7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 |
|
93
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
13 ramimage.srec: ramimage.m0 |
|
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
14 ../helpers/srec4ram $< $@ |
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6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
15 |
