FreeCalypso > hg > fc-magnetite
annotate cfg-headers/rv_swe-2092-pwr.h @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 02 Jan 2020 05:38:26 +0000 |
| parents | 05aa9659f6d6 |
| children |
| rev | line source |
|---|---|
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 #ifndef __RV_SWE_H__ |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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2 #define __RV_SWE_H__ |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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3 |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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4 #define RVM_AUDIO_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 #define RVM_ETM_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 #define RVM_DAR_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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7 #define RVM_SPI_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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8 #define RVM_LLS_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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9 #define RVM_KPD_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 #define RVM_PWR_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 #define RVM_R2D_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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12 #define RVM_RTC_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 #define RVM_FFS_SWE |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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14 |
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05aa9659f6d6
cfg-headers/rv_swe-209[12]-pwr.h: created
Mychaela Falconia <falcon@freecalypso.org>
parents:
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15 #endif /* __RV_SWE_H__ */ |
