FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/include/l1_ctl.h @ 660:293c7db5f10f
bmi3: fixed the mysterious "mute on first call" bug
When UI-enabled fw boots on a previously blank (no /mmi/* files) FFS
for the first time, the output_volume member of the persistent UI settings
structure was left uninitialized, corresponding to the earpiece volume
being set to mute, which is an invalid setting. Because of other quirks
in the far-from-finished UI code, this volume setting takes effect only
when the first call is answered, producing the odd behaviour seen at the
user level.
The current fix is to set the blank-FFS default for output_volume to
volume level 4, which is the same -6 dB Iota volume as the ACI default.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 14 May 2020 02:50:41 +0000 |
| parents | 50a15a54801e |
| children |
| rev | line source |
|---|---|
|
0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1 /************* Revision Controle System Header ************* |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2 * GSM Layer 1 software |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3 * L1_CTL.H |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4 * |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5 * Filename l1_ctl.h |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
6 * Copyright 2003 (C) Texas Instruments |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
7 * |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
8 ************* Revision Controle System Header *************/ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
9 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 /************************************/ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
11 /* Automatic timing control (TOA) */ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 /************************************/ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
13 #define C_RED 1 // Factor used to reduce the maximum accumulated values. |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
14 // Default : 1/2 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
15 #define C_GEW 1 // Weighting factor. Default : 1/2 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
16 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
17 #define C_SNRGR 2560 // 2.5 F6.10 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
18 #define C_SNR_THR 8192 // 8 F6.10 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
19 #define TOA_HISTO_LEN 11 // Histogram length |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
20 |
|
69
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
21 /* |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
22 * FreeCalypso Frankenstein: the following definition has been added |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
23 * from LoCosto version of this file, as it is used by l1_cmplx.c |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
24 * fairly extensively. |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
25 * |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
26 * Disassembly-matching reconstruction has revealed that the constant |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
27 * in question was originally 210 in the TCS211 version, and then |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
28 * increased to 220 in the LoCosto source. We currently seek to match |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
29 * TCS211 without any changes, hence we are setting it back to 210. |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
30 */ |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
31 #define IL_FOR_RXLEV_SNR 210 // RX POWER LEVEL |
|
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
0
diff
changeset
|
32 |
|
0
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
33 /************************************/ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
34 /* Automatic Gain Control (AGC) */ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
35 /************************************/ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
36 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
37 #define INDEX_MIN 0 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
38 #define INDEX_MAX 240 // 120 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
39 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
40 /************************************/ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
41 /* Automatic frequency compensation */ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
42 /************************************/ |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
43 #define C_thr_snr 2560 // 1/0.4 * 2**10 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
44 #define C_thr_P 524288L // 0.5 * 2**20 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
45 #define C_cov_start 838861L // 0.8 * 2**20 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
46 #define C_a0_kalman 10486L // 0.01 * 2**20 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
47 #define C_g_kalman 53687091L// 0.05 * 2**30 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
48 #define C_N_del 2 // delay of frequency control loop |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
49 // due to C W R pipeline |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
50 #define C_Q 3L // 0.000003 * 2**20 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
51 #define C_thr_K 209715L // 0.2 * 2**20 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
52 #define C_thr_phi 328 // 0.01 * 2**15 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
53 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
54 #if (VCXO_ALGO == 1) |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
55 #define C_WIN_AVG_SIZE_M 64 // average size M |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
56 #define C_PSI_AVG_SIZE_D 32 // distance size D |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
57 #define C_MSIZE (C_WIN_AVG_SIZE_M * C_PSI_AVG_SIZE_D) // Data history for predictor |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
58 #define C_RGAP_BAD_SNR_COUNT_B 32 // bad SNR count B |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
59 #define ALGO_AFC_RXGAP 1 // reception gap algo |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
60 #define ALGO_AFC_KALMAN 1 // Kalman filter |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
61 #define ALGO_AFC_LQG_PREDICTOR 2 // LQG filter + rgap predictor |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
62 #define ALGO_AFC_KALMAN_PREDICTOR 3 // Kalman filter + rgap predictor |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
63 #endif |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
64 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
65 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
66 // clipping related to AFC DAC linearity range |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
67 #define C_max_step 32000 // 4000 * 2**3 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
68 #define C_min_step -32000 // -4000 * 2**3 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
69 #endif |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
70 |
|
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
71 |
