FreeCalypso > hg > fc-magnetite

annotate src/cs/drivers/drv_core/timer/timer1.h @ 660:293c7db5f10f

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bmi3: fixed the mysterious "mute on first call" bug When UI-enabled fw boots on a previously blank (no /mmi/* files) FFS for the first time, the output_volume member of the persistent UI settings structure was left uninitialized, corresponding to the earpiece volume being set to mute, which is an invalid setting. Because of other quirks in the far-from-finished UI code, this volume setting takes effect only when the first call is answered, producing the odd behaviour seen at the user level. The current fix is to set the blank-FFS default for output_volume to volume level 4, which is the same -6 dB Iota volume as the ACI default.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 14 May 2020 02:50:41 +0000
parents 945cf7f506b2
children
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1 /*******************************************************************************
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
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3
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This
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6 product is protected under copyright law and trade secret law as an
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
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8 rights reserved.
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11 Filename : timer1.h
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13 Description :TIMER1
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15 Project : drivers
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17 Author : pmonteil@tif.ti.com Patrice Monteil.
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19 Version number : 1.7
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21 Date and time : 02/15/01 15:47:06
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23 Previous delta : 02/15/01 15:47:06
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25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P_FRED/drivers1/common/SCCS/s.timer1.h
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27 Sccs Id (SID) : '@(#) timer1.h 1.7 02/15/01 15:47:06 '
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30 *****************************************************************************/
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33 #include "l1sw.cfg"
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35 #if (OP_L1_STANDALONE == 0)
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36 #include "main/sys_types.h"
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37 #else
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38 #include "sys_types.h"
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39 #endif
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42 /**** DIONE TIMERs configuration register ****/
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44 #define D_TIMER_ADDR 0xfffe3800
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46 #define D_TIMER_CNTL_MASK 0x001f
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48 #define CNTL_D_TIMER_OFFSET 0x0000
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49 #define LOAD_D_TIMER_OFFSET 0x0002
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50 #define READ_D_TIMER_OFFSET 0x0004
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52 #define D_TIMER_CNTL (D_TIMER_ADDR+CNTL_D_TIMER_OFFSET)
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53 #define D_TIMER_LOAD (D_TIMER_ADDR+LOAD_D_TIMER_OFFSET)
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54 #define D_TIMER_READ (D_TIMER_ADDR+READ_D_TIMER_OFFSET)
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56 #define D_TIMER_ST 0x0001 /* bit 0 */
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57 #define D_TIMER_AR 0x0002 /* bit 1 */
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58 #define D_TIMER_PTV 0x001c /* bits 4:2 */
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59 #define D_TIMER_CLK_EN 0x0020 /* bit 5 */
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60 #define D_TIMER_RUN 0x0021 /* bit 5 ,0 */
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62 #define LOAD_TIM 0xffff /* bits 15:0 */
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68 /* ----- Prototypes ----- */
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69 SYS_UWORD16 Dtimer1_Get_cntlreg(void);
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71 void Dtimer1_AR(SYS_UWORD16 Ar);
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73 void Dtimer1_PTV(SYS_UWORD16 Ptv);
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75 void Dtimer1_Clken(SYS_UWORD16 En);
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77 void Dtimer1_Start (SYS_UWORD16 startStop);
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79 void Dtimer1_Init_cntl (SYS_UWORD16 St, SYS_UWORD16 Reload, SYS_UWORD16 clockScale, SYS_UWORD16 clkon);
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81 void Dtimer1_WriteValue (SYS_UWORD16 value);
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83 SYS_UWORD16 Dtimer1_ReadValue (void);