FreeCalypso > hg > fc-magnetite

annotate src/cs/drivers/drv_app/pwr/pwr_analog_dev.h @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents fb95e3f83dc5
children
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1 /*******************************************************************************
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2 *
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3 * pwr_analog_dev.h
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4 *
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5 * Purpose: This file contains definitions that can be used by any SWE
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6 * for power management services.
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7 *
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8 * Author Candice Bazanegue (c-brille@ti.com)
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9 *
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10 * (C) Texas Instruments 2001
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11 *
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12 ******************************************************************************/
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14 #ifndef __PWR_ANALOG_DEV_H__
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15 #define __PWR_ANALOG_DEV_H__
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17 #ifndef _WINDOWS
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18 #include "chipset.cfg"
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19 #endif
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21 /* Constants relative to the analog device */
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fb95e3f83dc5 imported PWR source: s/ANALOG/ANLG_FAM/ for TCS211 environment
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23 #if (ANLG_FAM == 1)
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25 #define VOLTAGE_LOOP_OFFSET 400 /* (mV) measured */
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26 #define MADC_OFFSET 160 /* (mV) measured */
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28 #define DAC_THRESHOLD 240 /* (mV) spec */
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29 #define DAC_VOLTAGE_STEP 1875 /* (uV) spec */
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30 #define DAC_CURRENT_STEP 937 /* (uA) */
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31 #define MADC_VOLTAGE_STEP 1710 /* (uV) spec */
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32 #define MADC_CURRENT_STEP 855 /* (uA) spec */
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34 #elif (ANLG_FAM == 2)
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36 #define VOLTAGE_LOOP_OFFSET 200 /* (mV) measured */
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37 #define MADC_OFFSET 160 /* (mV) measured */
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39 #define DAC_THRESHOLD 0 /* (mV) spec */
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40 #define DAC_VOLTAGE_STEP 1710 /* (uV) spec */
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41 #define DAC_CURRENT_STEP 855 /* (uA) */
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42 #define MADC_VOLTAGE_STEP 1710 /* (uV) spec */
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43 #define MADC_CURRENT_STEP 855 /* (uA) spec */
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45 #endif // ANLG_FAM
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47 #endif /* __PWR_ANALOG_DEV_H__ */